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83L51FB Schematic ( Datenblatt PDF ) - Intel Corporation

Teilenummer 83L51FB
Beschreibung LOW VOLTAGE CHMOS SINGLE-CHIP 8-BIT MICROCONTROLLERS
Hersteller Intel Corporation
Logo Intel Corporation Logo 

Gesamt 20 Seiten
		
83L51FB Datasheet, Funktion
8XL51FA FB FC
LOW VOLTAGE
CHMOS SINGLE-CHIP 8-BIT MICROCONTROLLERS
Commercial Express
87L51FA 83L51FA 80L51FA 87L51FB 83L51FB 87L51FC 83L51FC
Y High Performance CHMOS OTP ROM
ROM CPU
Y Low Voltage Operation
Y 20 MHz Commercial 16 MHz Express
Operation
Y Three 16-Bit Timer Counters
Y Programmable Counter Array with
High Speed Output
Compare Capture
Pulse Width Modulator
Watchdog Timer Capabilities
Y Up Down Timer Counter
Y Three Level Program Lock System
Y 8K 16K 32K On-Chip Program Memory
Y 256 Bytes of On-Chip Data RAM
Y Improved Quick Pulse Programming
Algorithm
Y Boolean Processor
Y 32 Programmable I O Lines
Y 7 Interrupt Sources
Y Four Level Interrupt Priority
Y Programmable Serial Channel with
Framing Error Detection
Automatic Address Recognition
Y 64K External Program Memory Space
Y 64K External Data Memory Space
Y MCS 51 Microcontroller Compatible
Instruction Set
Y Power Saving Idle and Power Down
Modes
Y ONCE (On-Circuit Emulation) Mode
Y Extended Temperature Range
(b40 C to a85 C)
MEMORY ORGANIZATION
ROM
Device
83L51FA
83L51FB
83L51FC
OTP ROM
Version
87L51FA
87L51FB
87L51FC
ROMLESS
Version
80L51FA
80L51FA
80L51FA
ROM
OTP ROM
Bytes
8K
16K
32K
RAM
Bytes
256
256
256
These devices can address up to 64 Kbytes of external program data memory
The Intel 8XL51FA 8XL51FB 8XL51FC is a single-chip control oriented microcontroller which is fabricated on
Intel’s reliable CHMOS III-E technology Being a member of the MCS 51 microcontroller family the
8XL51FA 8XL51FB 8XL51FC uses the same powerful instruction set has the same architecture and is pin-
for-pin compatible with the existing MCS 51 microcontroller products
The 8XL51FX is a 3V version of current 8XC51FX and will operate from 2 7V to 3 6V at a frequency range of
3 5 MHz to 16 MHz (Express) 20 MHz (Commercial)
For the remainder of this document the 8XL51FA 8XL51FB 8XL51FC will be referred to as the 8XL51FX
unless information applies to a specific device
Other brands and names are the property of their respective owners
Information in this document is provided in connection with Intel products Intel assumes no liability whatsoever including infringement of any patent or
copyright for sale and use of Intel products except as provided in Intel’s Terms and Conditions of Sale for such products Intel retains the right to make
changes to these specifications at any time without notice Microcomputer Products may have minor variations to this specification known as errata
COPYRIGHT INTEL CORPORATION 1995
November 1994
Order Number 272356-003






83L51FB Datasheet, Funktion
8XL51FA FB FC
POWER DOWN MODE
To save even more power a Power Down mode can
be invoked by software In this mode the oscillator
is stopped and the instruction that invoked Power
Down is the last instruction executed The on-chip
RAM and Special Function Registers retain their val-
ues until the Power Down mode is terminated
On the 8XL51FX either hardware reset or external
interrupt can cause an exit from Power Down Reset
redefines all the SFRs but does not change the on-
chip RAM An external interrupt allows both the
SFRs and the on-chip RAM to retain their values
To properly terminate Power Down the reset or ex-
ternal interrupt should not be executed before VCC is
restored to its normal operating level and must be
held active long enough for the oscillator to restart
and stabilize (normally less than 10 ms)
With an external interrupt INT0 or INT1 must be en-
abled and configured as level-sensitive Holding the
pin low restarts the oscillator but bringing the pin
back high completes the exit Once the interrupt is
serviced the next instruction to be executed after
RETI will be the one following the instruction that put
the device into Power Down
DESIGN CONSIDERATION
 The 8XL51FX will operate from 2 7V to 3 6V with
a frequency range of 3 5 MHz to 16 MHz (Ex-
press) 20 MHz (Commercial) Operating beyond
these specifications could cause improper device
functionality
 All VCC and VSS pins must be connected Please
refer to Figure 2 Pin Connections for the specific
pins
 When the idle mode is terminated by a hardware
reset the device normally resumes program exe-
cution from where it left off up to two machine
cycles before the internal reset algorithm takes
control On-chip hardware inhibits access to inter-
nal RAM in this event but access to the port pins
is not inhibited To eliminate the possibility of an
unexpected write when Idle is terminated by re-
set the instruction following the one that invokes
Idle should not be one that writes to a port pin or
to external memory
ONCE MODE
The ONCE (‘‘On-Circuit Emulation’’) Mode facilitates
testing and debugging of systems using the
8XL51FX without the 8XL51FX having to be re-
moved from the circuit The ONCE Mode is invoked
by
1) Pull ALE low while the device is in reset and
PSEN is high
2) Hold ALE low as RST is deactivated
While the device is in ONCE Mode the Port 0 pins
float and the other port pins and ALE and PSEN are
weakly pulled high The oscillator circuit remains ac-
tive While the 8XL51FX is in this mode an emulator
or test CPU can be used to drive the circuit Normal
operation is restored when a normal reset is applied
Mode
Idle
Idle
Power Down
Power Down
Table 1 Status of the External Pins during Idle and Power Down
Program
Memory
ALE
PSEN
PORT0
PORT1
PORT2
Internal
1
1
Data
Data
Data
External
1
1
Float
Data
Address
Internal
0
0
Data
Data
Data
External
0
0
Float
Data
Data
PORT3
Data
Data
Data
Data
NOTE
For more detailed information on the reduced power modes refer to current Embedded Microcontrollers and Processors
Handbook Volume I 270646 and Application Note AP-252 (Embedded Applications Handbook) 270648 ‘‘Designing
with the 80C51BH ’’
6

6 Page







83L51FB pdf, datenblatt
8XL51FA FB FC
EXTERNAL MEMORY CHARACTERISTICS (Continued)
All parameter values apply to all devices unless otherwise indicated
Symbol
Parameter
12 MHz
Oscillator
Min Max
20 MHz
Oscillator
Min Max
Variable
Oscillator
Min Max
TPXIZ
Input Instruction Float
After PSEN
8XL51FX
8XL51FX-20
59
30
TCLCL b 25
TCLCL b 20
TAVIV
Address to Valid
Instruction In
312 145
5 TCLCL b 105
TPLAZ
PSEN Low to Address
Float
10 10
10
TRLRH RD Pulse Width
400 200 6 TCLCL b 100
TWLWH WR Pulse Width
400 200 6 TCLCL b 100
TRLDV
RD Low to Valid Data In
8XL51FX
8XL51FX-20
252
155
5 TCLCL b 165
5 TCLCL b 95
TRHDX Data Hold After RD
0
0
0
TRHDZ Data Float After RD
107 40
2 TCLCL b 60
TLLDV ALE Low to Valid Data In
8XL51FX
517
8XL51FX-20
310
8 TCLCL b 150
8 TCLCL b 90
TAVDV
Address to Valid Data In
8XL51FX
8XL51FX-20
585
360
9 TCLCL b 165
9 TCLCL b 90
TLLWL ALE Low to RD or WR
Low
200 300 100 200 3 TCLCL b 50 3 TCLCL a 50
TAVWL Address Valid to WR
Low
8XL51FX
203
4 TCLCL b 130
8XL51FX-20
110 4 TCLCL b 90
TQVWX
Data Valid before WR
8XL51FX
8XL51FX-20
33
15
TCLCL b 50
TCLCL b 35
TWHQX
Data Hold after WR
8XL51FX
8XL51FX-20
33
10
TCLCL b 50
TCLCL b 40
TQVWH Data Valid to WR High
8XL51FX
433
7 TCLCL b 150
8XL51FX-20
280 7 TCLCL b 70
TRLAZ RD Low to Address Float
0
0
0
TWHLH RD or WR High to ALE
High
43 123 10 90
TCLCL b 40
TCLCL a 40
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
12

12 Page


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