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83C51GB Schematic ( Datenblatt PDF ) - Intel Corporation

Teilenummer 83C51GB
Beschreibung CHMOS SINGLE-CHIP 8-BIT MICROCONTROLLER
Hersteller Intel Corporation
Logo Intel Corporation Logo 

Gesamt 22 Seiten
		
83C51GB Datasheet, Funktion
8XC51GB
CHMOS SINGLE-CHIP 8-BIT MICROCONTROLLER
Commercial Express
87C51GB 8 Kbytes OTP 8 Kbytes Internal Program Memory
83C51GB 8 Kbytes Factory Programmable ROM
80C51GB CPU with RAM and I O
8XC51GB 3 5 MHz to 12 MHz g20% VCC
8XC51GB-1 3 5 MHz to 16 MHz g20% VCC
Y 8 Kbytes On-Chip ROM OTP ROM
Y 256 Bytes of On-Chip Data RAM
Y Two Programmable Counter Arrays
with
2 x 5 High Speed Input Output
Channels Compare Capture
Pulse Width Modulators
Watchdog Timer Capabilities
Y Three 16-Bit Timer Counters with
Four Programmable Modes
Capture Baud Rate Generation
(Timer 2)
Y Dedicated Watchdog Timer
Y 8-Bit 8-Channel A D with
Eight 8-Bit Result Registers
Four Programmable Modes
Y Programmable Serial Channel with
Framing Error Detection
Automatic Address Recognition
Y Serial Expansion Port
Y Programmable Clock Out
Y Extended Temperature Range
(b40 C to a85 C)
Y 48 Programmable I O Lines with
40 Schmitt Trigger Inputs
Y 15 Interrupt Sources with
7 External 8 Internal Sources
4 Programmable Priority Levels
Y Pre-Determined Port States on Reset
Y High Performance CHMOS Process
Y TTL and CHMOS Compatible Logic
Levels
Y Power Saving Modes
Y 64K External Data Memory Space
Y 64K External Program Memory Space
Y Three Level Program Lock System
Y ONCE (ON-Circuit Emulation) Mode
Y Quick Pulse Programming Algorithm
Y MCS 51 Microcontroller Fully
Compatible Instruction Set
Y Boolean Processor
Y Oscillator Fail Detect
Y Available in 68-Pin PLCC
MEMORY ORGANIZATION
PROGRAM MEMORY Up to 8 Kbytes of the program memory can reside in the on-chip ROM Also the device
can address up to 64K of program memory external to the chip
DATA MEMORY This microcontroller has a 256 x 8 on-chip RAM In addition it can address up to 64 Kbytes of
external data memory
The Intel 8XC51GB is a single-chip control oriented microcontroller which is fabricated on Intel’s CHMOS III-E
technology The 8XC51GB is an enhanced version of the 8XC51FA and uses the same powerful instruction
set and architecture as existing MCS 51 microcontroller products Added features make it an even more
powerful microcontroller for applications that require On-Chip A D Pulse Width Modulation High Speed I O
up down counting capabilities and memory protection features It also has a more versatile serial channel that
facilitates multi-processor communications
Other brands and names are the property of their respective owners
Information in this document is provided in connection with Intel products Intel assumes no liability whatsoever including infringement of any patent or
copyright for sale and use of Intel products except as provided in Intel’s Terms and Conditions of Sale for such products Intel retains the right to make
changes to these specifications at any time without notice Microcomputer Products may have minor variations to this specification known as errata
COPYRIGHT INTEL CORPORATION 1995
November 1994
Order Number 272337-002






83C51GB Datasheet, Funktion
8XC51GB
C1 C2 e 30 pF g10 pF for Crystals
For Ceramic Resonators contact resonator
manufacturer
272337 – 4
Figure 4 Oscillator Connections
POWER DOWN MODE
To save even more power a Power Down mode can
be invoked by software In this mode the oscillator
is stopped and the instruction that invoked Power
Down is the last instruction executed The on-chip
RAM and Special Function Registers retain their val-
ues until the Power Down mode is terminated
On the 8XC51GB either a hardware reset or an ex-
ternal interrupt can cause an exit from Power Down
Reset redefines all the SFRs but does not change
the on-chip RAM An external interrupt does not re-
define the SFR’s or change the on-chip RAM An
external interrupt will modify the interrupt associated
SFR’s in the same way an interrupt will in all other
modes The interrupt must be enabled and config-
ured as level sensitive To properly terminate Power
Down the reset or external interrupt should not be
executed before VCC is restored to its normal oper-
ating level The reset or external interrupt must be
held active long enough for the oscillator to restart
and stabilize The Oscillator Fail Detect must be dis-
abled prior to entering Power Down
272337 – 5
Figure 5 External Clock Drive Configuration
IDLE MODE
The user’s software can invoke the Idle Mode When
the microcontroller is in this mode power consump-
tion is reduced The Special Function Registers and
the onboard RAM retain their values during idle pe-
ripherals continue to operate but the processor
stops executing instructions Idle Mode will be exited
if the chip is reset or if an enabled interrupt occurs
The PCA timer counter can optionally be left run-
ning or paused during Idle Mode The Watchdog
Timer continues to count in Idle Mode and must be
serviced to prevent a device RESET while in Idle
DESIGN CONSIDERATIONS
 When the idle mode is terminated by a hardware
reset the device normally resumes program exe-
cution from where it left off up to two machine
cycles before the internal reset algorithm takes
control On-chip hardware inhibits access to inter-
nal RAM in this event but access to the port pins
is not inhibited To eliminate the possibility of an
unexpected write when Idle is terminated by re-
set the instruction following the one that invokes
Idle should not be one that writes to a port pin or
to external memory
 As RESET rises the 8XC51GB will remain in re-
set for up to 5 machine cycles (60 oscillator peri-
ods) after RESET reaches VIH1
Table 1 Status of the External Pins during Idle and Power Down
Mode
Program
Memory
ALE PSEN
PORT0
PORT1
PORT2
PORT3
Idle
Internal
1
1
Data
Data
Data
Data
Idle
External 1
1
Float
Data Address Data
Power Down Internal
0
0
Data
Data
Data
Data
Power Down External 0
0
Float
Data
Data
Data
NOTE
For more detailed information on the reduced power modes refer to current Embedded Microcontrollers
and Processors Handbook Volume I (Order No 270645) and Application Note AP-252 (Embedded
Applications Handbook Order No 270648) ‘‘Designing with the 80C51BH ’’
6

6 Page







83C51GB pdf, datenblatt
8XC51GB
EXTERNAL PROGRAM MEMORY READ CYCLE
EXTERNAL DATA MEMORY READ CYCLE
272337 – 11
EXTERNAL DATA MEMORY WRITE CYCLE
272337 – 12
272337 – 13
12

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