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PDF 83C196LD Data sheet ( Hoja de datos )
| Número de pieza | 83C196LD | |
| Descripción | CHMOS 16-BIT MICROCONTROLLER | |
| Fabricantes | Intel Corporation | |
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ADVANCE INFORMATION
83C196LC, 83C196LD
CHMOS 16-BIT MICROCONTROLLER
Automotive
s 22 MHz operation†
s 32 Kbytes of on-chip ROM (LC)
16 Kbytes of on-chip ROM (LD)
s 1 Kbyte of on-chip register RAM (LC)
384 bytes of on-chip register RAM (LD)
s 512 bytes of on-chip code RAM
(LC only)
s Register-to-register architecture
s Peripheral transaction server (PTS)
with high-speed, microcoded interrupt
service routines
s Full-duplex serial I/O port with
dedicated baud-rate generator
s Enhanced full-duplex, synchronous
serial I/O port (SSIO)
† 12 MHz standard; 18 MHz and 22 MHz are speed
premium
s High-speed event processor array
— Six capture/compare channels
— Two compare-only channels
— Two 16-bit software timers
s Programmable 8- or 16-bit external bus
s Design enhancements for EMI
reduction
s Oscillator failure detection circuitry
s SFR register that indicates the source
of the last reset
s Watchdog timer (WDT)
s Cost reduced replacements for the
87C196JT and 87C196JR.
s –40° C to +125° C ambient temperature
s 52-pin PLCC package
NOTE
This document contains information on products in the sampling and initial production
phases of development. The specifications are subject to change without notice. Verify
with your local Intel sales office that you have the latest datasheet before finalizing a
design.
The 83C196LC, 83C196LD are low-cost, pin-compatible replacements for the existing 87C196JT and
87C196JR, respectively. These products feature an enhanced synchronous serial I/O (SSIO) port for more
flexible communication to other devices. The enhanced SSIO is compatible with Motorola’s Serial Peripheral
Interface (SPI) protocol and National’s Microwire protocol. To optimize die size, the A/D converter was
removed for use in those applications that use an off-chip A/D converter.
The MCS® 96 microcontroller family members are all high-performance microcontrollers with 16-bit CPUs.
The 83C196LC, 83C196LD are composed of a high-speed core with the following peripherals: an
asynchronous/synchronous serial I/O port (8096 compatible) with a dedicated 16-bit baud-rate generator; an
additional synchronous serial I/O port with full duplex master/slave transceivers; a flexible timer/counter
structure with prescaler, cascading, and quadrature capabilities; six modularized, multiplexed high-speed I/O
for capture and compare (called event processor array) with 200 ns resolution and double buffered inputs;
and a sophisticated, prioritized interrupt structure with programmable peripheral transaction server (PTS).
The 83C196LC has the highest memory density of the 52-pin MCS 96 microcontroller family, with 32 Kbytes
of on-chip ROM, 1 Kbyte of on-chip register RAM, and 512 bytes of code RAM. The high memory integration
of the 83C196LC supports high functionality in a low pin-count package and the use of the C programming
language.
COPYRIGHT © INTEL CORPORATION, 1996
December 1996
Order Number: 272805-001
1 page  
AUTOMOTIVE — 83C196LC, 83C196LD
Addr & Data
Name Pin
AD0 22
AD1 21
AD2 20
AD3 19
AD4 18
AD5 17
AD6 16
AD7 15
AD8 14
AD9 13
AD10
12
AD11
11
AD12
10
AD13
9
AD14
8
AD15
7
Input
Name Pin
P0.2
33
P0.3
34
P0.4
35
P0.5
36
P0.6
37
P0.7
38
Table 3. Pin Assignment Arranged by Functional Categories
Input/Output
Input/Output (Cont’d)
Processor Control
Name
Pin
Name
Pin
Name
Pin
P1.0/EPA0/T2CLK 44 P4.7
7 CLKOUT
32
P1.1/EPA1
43 P5.0
2 EA#
24
P1.2/EPA2/T2DIR 42 P5.2
6 EXTINT
29
P1.3/EPA3
41 P5.3
5 ONCE#
31
P2.0/TXD
27 P6.0/EPA8
45 RESET#
23
P2.1/RXD
28 P6.1/EPA9
46 XTAL1
52
P2.2
29 P6.4/SC0
47 XTAL2
51
P2.4
30 P6.5/SD0
48
P2.6
31 P6.6/SC1
49 Bus Control & Status
P2.7
32 P6.7/SD1
50
Name
Pin
P3.0
22
ADV#/ALE
2
P3.1
21
Power & Ground
RD#
5
P3.2
20
Name
Pin WR#/WRL#
6
P3.3
P3.4
P3.5
P3.6
P3.7
P4.0
P4.1
P4.2
19 VCC
18 VCC
17 VPP
16 VSS
15 VSS
14 VSS
13 VSS
12
26
40
4
1
3
25
39
P4.3
11
P4.4
10
P4.5
9
P4.6
8
ADVANCE INFORMATION
5
5 Page 
AUTOMOTIVE — 83C196LC, 83C196LD
4.0 ADDRESS MAP
Table 5. Address Map
Hex Address Range
LC LD
Description
Addressing
Modes
FFFF
A000
FFFF External device (memory or I/O) connected to
6000 address/data bus
Indirect or indexed
9FFF
2080
5FFF
2080
Program memory (internal nonvolatile or external memory);
see Note 1
Indirect or indexed
207F
2000
207F
2000
Special-purpose memory (internal nonvolatile or external
memory)
Indirect or indexed
1FFF
1FE0
1FFF
1FE0
Memory-mapped SFRs
Indirect or indexed
1FDF
1F00
1FDF
1F00
Peripheral SFRs
Indirect, indexed, or
windowed direct
1EFF
1C00
1EFF External device (memory or I/O) connected to
1C00 address/data bus; (future SFR expansion; see Note 2)
Indirect or indexed
1BFF
0600
1BFF External device (memory or I/O) connected to
0600 address/data bus
Indirect or indexed
05FF
0400
— Internal code or data RAM
Indirect or indexed
—
05FF
0180
External device (memory or I/O) connected to
address/data bus
Indirect or indexed
03FF
0100
017F
0100
Upper register file (general-purpose register RAM)
Indirect, indexed, or
windowed direct
00FF
0000
00FF
0000
Lower register file (register RAM, stack pointer, and CPU Direct, indirect, or
SFRs)
indexed
NOTES:
1. After a reset, the microcontroller fetches its first instruction from 2080H.
2. The content or function of these locations may change in future microcontroller revisions, in which
case a program that relies on a location in this range might not function properly.
5.0 ELECTRICAL CHARACTERISTICS
ABSOLUTE MAXIMUM RATINGS
Storage temperature ............................... –60° C to +150° C
Supply voltage with respect to VSS ............. –0.5 V to +13.0 V
Power dissipation ......................................................... 0.5 W
OPERATING CONDITIONS†
TA (Ambient temperature under bias)........ –40° C to +125° C
VCC (Digital supply voltage) ......................... 4.50 V to 5.50 V
FXTAL1 (Oscillator frequency)....................... 4 MHz to 22 MHz
NOTICE: This document contains information on
products in the sampling and initial production
phases of development. The specifications are
subject to change without notice. Verify with your
local Intel sales office that you have the latest
datasheet before finalizing a design.
† WARNING: Stressing the device beyond the
“Absolute Maximum Ratings” may cause perma-
nent damage. These are stress ratings only. Oper-
ation beyond the “Operating Conditions” is not
recommended and extended exposure beyond the
“Operating Conditions” may affect device
reliability.
ADVANCE INFORMATION
11
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| PDF Descargar | [ Datasheet 83C196LD.PDF ] | |
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