PDF PI6C2502 Data sheet ( Hoja de datos )

Número de pieza	PI6C2502
Descripción	Phase-Locked Loop Clock Driver
Fabricantes	Pericom Semiconductor Corporation
Logotipo
Hay una vista previa y un enlace de descarga de PI6C2502 (archivo pdf) en la parte inferior de esta página. Total 6 Páginas
No Preview Available ! PI6C2502 11122233344455566677788899900011122233344455566677788899900011122233344455566677788899900011122211122233344455566677788899900011122233344455566677788899900011122233344455566677788899900011122211122233344455566677788899900011122233344455566677788899900011122233344455566677788899900011122211122233344455566677788899900011122233344455566677788899900011122233344455566622777111888222999333000444111555266677788899900011122 2 Phase-Locked Loop Clock Driver Product Features • High-Performance Phase-Locked-Loop Clock Distribution for Networking, • Synchronous DRAM modules for server/workstation/ PC applications • Allows Clock Input to have Spread Spectrum modulation for EMI reduction • Zero Input-to-Output delay • Low jitter: Cycle-to-Cycle jitter ±100ps max. • On-chip series damping resistor at clock output drivers for low noise and EMI reduction • Operates at 3.3V VCC • Wide range of Clock Frequencies up to 80 MHz • Package: Plastic 8-pin SOIC Package (W) Product Description The PI6C2502 features a low-skew, low-jitter, phase-locked loop (PLL) clock driver. By connecting the feedback FB_OUT output to the feedback FB_IN input, the propagation delay from the CLK_IN input to any clock output will be nearly zero. Application If a system designer needs more than 16 outputs with the features just described, using two or more zero-delay buffers such as PI6C2509Q, and PI6C2510Q, is likely to be impractical. The device-to-device skew introduced can significantly reduce the performance. Pericom recommends the use of a zero-delay buffer and an eighteen output non-zero-delay buffer. As shown in Figure 1, this combination produces a zero-delay buffer with all the signal characteristics of the original zero-delay buffer, but with as many outputs as the non-zero-delay buffer part. For example, when combined with an eighteen output non-zero delay buffer, a system designer can create a seventeen-output zero-delay buffer. Logic Block Diagram Product Pin Configuration CLK_IN FB_IN AVCC PLL CLK_OUT FB_OUT AGND FB_OUT CLK_OUT VCC 1 2 3 4 8-Pin W 8 CLK_IN 7 AVCC 6 GND 5 FB_IN Feedback Reference Clock Signal Zero Delay Buffer PI6C2502 CLK_OUT 18 Output Non-Zero Delay Buffer 17 Figure 1. This Combination Provides Zero-Delay Between the Reference Clocks Signal and 17 Outputs 1 PS8382B 03/20/02 1 page PI6C25021122334455667788990011223344556677889900112233445566778899001122112233445566778899001122334455667788990011223344556677889900112211223344556677889900112233445566778899001122334455667788990011221122334455667788990011223344556677889900112233445566778899001122112233445566778899001122 Phase-Locked Loop Clock Driver Schematic Drawing 3.3V Power Supply 1.5µH PI6C2502 INPUT_CLOCK 25-150 MHZ AGND FB_OUT .22µF 4.7µF .002µF CLK_OUT VCC CLK_IN AVCC GND FB_IN 4.7µF .22µF 1.5µH .002µF Board AVCC 5-12pF Feedback Capacitor Decoupling Capacitors Series Terminating Resistor Clock Chip Layout GND C C C PI6C2502 AVCC Island for PI6C2510 R L VCC AGND FB_OUT CLK_OUT GND FB_IN AVCC L CFB Use Wider Traces for Ground and Power (0.034-inch width, 0.1-inch pitch) Legend: GND = Via to Digital Ground AGND = Via to Analog Ground VCC = Via to 3.3V Digital Power AVCC = Via to 3.3V Analog Power R = Termination Resistor 12-32Ω C = Decoupling Capacitor L = Inductor CFB = Feedback Capacitor CLK_IN C AGND C AGND C AGND GND 5 PS8382B 03/20/02 5 Page

Páginas	Total 6 Páginas
PDF Descargar	[ Datasheet PI6C2502.PDF ]

Hoja de datos destacado

Número de pieza	Descripción	Fabricantes
PI6C2501	Phase-Locked Loop Clock Driver	Pericom Semiconductor
PI6C2502	Phase-Locked Loop Clock Driver	Pericom Semiconductor Corporation
PI6C2502A	Phase-Locked Loop Clock Driver	Pericom Semiconductor Corporation
PI6C2502AW	Phase-Locked Loop Clock Driver	Pericom Semiconductor Corporation

Número de pieza	Descripción	Fabricantes
SLA6805M	High Voltage 3 phase Motor Driver IC.	Sanken
SDC1742	12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters.	Analog Devices

DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares,
permitiéndote verlos en linea o descargarlos en PDF.

DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar