|
|
PDF PEF22554 Data sheet ( Hoja de datos )
| Número de pieza | PEF22554 | |
| Descripción | Quad E1/T1/J1 Framer and Line Interface Component for Long and Short Haul Applications | |
| Fabricantes | Infineon Technologies AG | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de PEF22554 (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
|
No Preview Available !
Delta Sheet
QuadFALC®
DS7, 2002-09-16
Quad E1/T1/J1 Framer and Line Interface Component for Long and Short
Haul Applications
PEF 22554 HT Version 2.1
PEF 22554 E Version 2.1
Preface
This document describes the changes implemented in the QuadFALC® Version 2.1
related to the previous version 1.3. All functions not mentioned in this document remain
unchanged.
QuadFALC® Version 2.1 is a pin-compatible replacement of QuadFALC® Version 1.x.
Severe errata of QuadFALC® Version 1.3 are fixed. For more information please contact
your local sales office.
Organization of this Document
•
www.DataSheet4U.com
•
•
•
Chapter 1, Overview
Gives a general description of the product differences to its predecessor.
Chapter 2, Electrical Characteristics
Shows the differences in electrical behavior.
Chapter 2.4, Changed Supply Power Test Conditions T1/J1
Shows the mechanical dimensions of the new BGA package.
Chapter 3, Appendix
Shows a screenshot of the available software tool.
Related Documentation
Data Sheet PEF 22554 Version 2.1
Errata Sheet PEB 22554 Version 1.3
Addendum PEB 22554 Version 1.3
Revision History: Previous Version:
Preliminray Delta Sheet DS 6, 2002-08-19
Major Changes:
“Functional Changes” on Page 2: Additional compare status field (CCR5.6)
“Changed DC Characteristics” on Page 26: Power Supply Currents & LOS Limits,
Delta Sheet
1/30
2002-09-16
1 page  
QuadFALC®
PEF 22554
Overview
1 2 3 4 5 6 7 8 9 10 11 12 13 14
A XL1_2 XL2_2 VDDR VSSR RL1_2 RL2_2 RL2_1 RL1_1 VSSR VDDR XL2_1 XL1_1
B VSSX VSSX XDI1 MCLK XPC2 TRS XPD2 VDD XPA1 VDDP XPB1 D15 VSSX VSSX
C VDDX
VDDX
SCLKX
1
TCK
VSSP VDDP XPA2 XPB2 XPC1 VDDC
TDO
D14 VDDX VDDX
D RPC1 RPA1 RPB1 RPD1 TMS VSEL RCLK2 VSS XPD1 RCLK1 TDI D12 D13 D11
E RDO1
SCLKR
1
VDD
VDD
VSS VDD VDD D10
F RDO2
VSS
SCLKR
2
RPA2
D9 D7 D8 D6
G RPC2
RPB2
SCLKX
2
RPD2
VSS VSS
D5 VDD D4
D3
H XDI3
SCLKX
3
XDI2
RPA3
VSS VSS
D2 VSS D0
D1
J RPB3
RPD3
RPC3
SCLKR
3
BHE/
BLE
CS
W R/
RW
RD/DS
K RDO3 VSS VDD RDO4
A9
L SCLKR
4
RPB4
RPA4
DBW RCLK3 XPA3
XPD3
XPB4
ALE
SEC/
FSC
A5
M VDDX VDDX RPC4 INT
RES
SCLKX
4
VDD
VDD XPD4 VDDC
IM
A8 A6 A7
A3 A2 A4
A1 VDDX VDDX
N VSSX VSSX RPD4 XDI4 XPC3 SYNC XPB3 XPA4 RCLK4 VSS XPC4 A0 VSSX VSSX
P XL1_3 XL2_3 VDDR VSSR RL1_3 RL2_3 RL2_4 RL1_4 VSSR VDDR XL2_4 XL1_4
F0213_2
Figure 4 Ball Layout P-BGA-160-1, Top View
Delta Sheet
5/30
2002-09-16
5 Page 
QuadFALC®
PEF 22554
Overview
Table 2
Ball No.
BGA
L6
N8
B11
C8
N7
L8
C9
B5
N5
N11
D9
B7
L7
M9
B6
D11
D5
C4
C11
M5
D6
A11
A4
P4
P11
A10
A5
P5
P10
BGA Pin Assignment (cont’d)
Pin No. Symbol
TQFP
Input(I) Function
Output(O)
Supply(S)
51 XPA3
I/O + PU Transmit Multifunction Port A, Ch. 3
57 XPA4
I/O + PU Transmit Multifunction Port A, Ch. 4
121 XPB1
I/O + PU Transmit Multifunction Port B, Ch. 1
127 XPB2
I/O + PU Transmit Multifunction Port B, Ch. 2
52 XPB3
I/O + PU Transmit Multifunction Port B, Ch. 3
58 XPB4
I/O + PU Transmit Multifunction Port B, Ch. 4
122 XPC1
I/O + PU Transmit Multifunction Port C, Ch. 1
128 XPC2
I/O + PU Transmit Multifunction Port C, Ch. 2
53 XPC3
I/O + PU Transmit Multifunction Port C, Ch. 3
59 XPC4
I/O + PU Transmit Multifunction Port C, Ch. 4
123 XPD1
I/O + PU Transmit Multifunction Port D, Ch. 1
129 XPD2
I/O + PU Transmit Multifunction Port D, Ch. 2
54 XPD3
I/O + PU Transmit Multifunction Port D, Ch. 3
60 XPD4
I/O + PU Transmit Multifunction Port D, Ch. 4
131 TRS
I + PU
Test Reset for Boundary Scan
112 TDI
I + PU
Test Data Input
141 TMS
I + PU
Test Mode Select
140 TCK
I + PU
Test Clock
113 TDO
O
Test Data Output
46 RES
I
Reset
134 VSEL
I + PU
Voltage Select
114 VDDR
S
Power Supply for analog receiver 1
139 VDDR
S
Power Supply for analog receiver 2
42 VDDR S
Power Supply for analog receiver 3
67 VDDR S
Power Supply for analog receiver 4
117 VSSR
S
Ground for analog receiver 1
136 VSSR
S
Ground for analog receiver 2
45 VSSR S
Ground for analog receiver 3
64 VSSR S
Ground for analog receiver 4
Delta Sheet
11/30
2002-09-16
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet PEF22554.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| PEF22554 | Quad E1/T1/J1 Framer and Line Interface Component for Long and Short Haul Applications | Infineon Technologies AG |
| PEF22554E | Quad E1/T1/J1 Framer and Line Interface Component for Long and Short Haul Applications | Infineon Technologies AG |
| PEF22554E | Quad E1/T1/J1 Framer and Line Interface Component for Long and Short Haul Applications | Infineon Technologies AG |
| PEF22554HT | Quad E1/T1/J1 Framer and Line Interface Component for Long and Short Haul Applications | Infineon Technologies AG |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |