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PEEL18CV8PI-25 Schematic ( PDF Datasheet ) - ETC

Teilenummer PEEL18CV8PI-25
Beschreibung CMOS Programmable Electrically Erasable Logic Device
Hersteller ETC
Logo ETC Logo 




Gesamt 10 Seiten
PEEL18CV8PI-25 Datasheet, Funktion
® International
CMOS
Technology
Commercial/
Industrial
PEEL™ 18CV8 -5/-7/-10/-15/-25
CMOS Programmable Electrically Erasable Logic Device
Features
s Multiple Speed Power, Temperature Options
- VCC = 5 Volts ±10%
- Speeds ranging from 5ns to 25 ns
- Power as low as 37mA at 25MHz
- Commercial and industrial versions available
s CMOS Electrically Erasable Technology
- Superior factory testing
- Reprogrammable in plastic package
- Reduces retrofit and development costs
s Development / Programmer Support
- Third party software and programmers
- ICT PLACE Development Software and PDS-3
programmer
- PLD-to-PEEL JEDEC file translator
Architectural Flexibility
- Enhanced architecture fits in more logic
- 74 product terms x 36 input AND array
- 10 inputs and 8 I/O pins
- 12 possible macrocell configurations
- Asynchronous clear
- Independent output enables
-- 20 Pin DIP/SOIC/TSSOP and PLCC
s Application Versatility
- Replaces random logic
- Super sets PLDs (PAL, GAL, EPLD)
- Enhanced Architecture fits more logic than ordinary
PLDs
General Description
The PEEL18CV8 is a Programmable Electrically Erasable
Logic (PEEL) device providing an attractive alternative to
ordinary PLDs. The PEEL18CV8 offers the performance,
flexibility, ease of design and production practicality needed
by logic designers today.
The PEEL18CV8 is available in 20-pin DIP, PLCC, SOIC
and TSSOP packages with speeds ranging from 5ns to
25ns with power consumption as low as 37mA. EE-Repro-
grammability provides the convenience of instant repro-
gramming for development and reusable production
inventory minimizing the impact of programming changes
or errors. EE-Reprogrammability also improves factory
testability, thus assuring the highest quality possible.
The PEEL18CV8 architecture allows it to replace over 20
standard 20-pin PLDs (PAL, GAL, EPLD etc.). It also pro-
vides additional architecture features so more logic can be
put into every design. ICT’s JEDEC file translator instantly
converts to the PEEL18CV8 existing 20-pin PLDs without
the need to rework the existing design. Development and
programming support for the PEEL18CV8 is provided by
popular third-party programmers and development software.
ICT also offers free PLACE development software and a
low-cost development system (PDS-3).
Figure 1 Pin Configuration
Figure 2 Block Diagram
DIP
I/CLK
I
I
I
I
I
I
I
I
GND
1
2
3
4
5
6
7
8
9
10
TSSOP
20 VCC
19 I/O
18 I/O
17 I/O
16 I/O
15 I/O
14 I/O
13 I/O
12 I/O
11 I
PLCC
SOIC
1
04-02-004H






PEEL18CV8PI-25 Datasheet, Funktion
® International
CMOS
Technology
Absolute Maximum Ratings
Symbol
VCC
VI, VO
IO
TST
TLT
Parameter
Supply Voltage
Voltage Applied to Any Pin2
Output Current
Storage Temperature
Lead Temperature
Operating Range
Symbol
Parameter
Vcc
TA
TR
TF
TRVCC
Supply Voltage
Ambient Temperature
Clock Rise Time
Clock Fall TIme
VCC Rise Time
PEELTM 18CV8
This device has been designed and tested for the specified
operating ranges. Proper operation outside of these levels
is not guaranteed. Exposure to absolute maximum ratings
may cause permanent damage.
Conditions
Relative to Ground
Relative to Ground1
Per Pin (IOL, IOH)
Soldering 10 Seconds
Rating
-0.5 to + 6.0
-0.5 to VCC + 0.6
±25
-65 to +150
+300
Unit
V
V
mA
°C
°C
Conditions
Commercial
Industrial
Commercial
Industrial
See Note 3.
See Note 3.
See Note 3.
Min
4.75
4.5
0
-40
Max
5.25
5.5
+70
+85
20
20
250
Unit
V
V
°C
°C
ns
ns
ms
D.C. Electrical Characteristics Over the operating range (Unless otherwise specified)
Symbol
VOH
VOHC
VOL
VOLC
VIH
VIL
IIL
IIP
IIH
ISC9
Parameter
Output HIGH Voltage - TTL
Output HIGH Voltage - CMOS12
Output LOW Voltage - TTL
Output LOW Voltage - CMOS12
Input HIGH level
Input LOW Voltage
Input, I/O Leakage Current LOW
Input and I/O pull-ups disabled
Input, I/O Leakage Current LOW
Input and I/O pull-ups enabled
Input, I/O Leakage Current HIGH
Output Short Circuit Current
ICC10
VCC Current, f=1MHz
CIN7
COUT7
Input Capacitance
Output Capacitance
Conditions
VCC = Min, IOH = -4.0 mA
VCC = Min, IOH = -10 µA
VCC = Min, IOL = 16mA/24mA13
VCC = Min, IOL = 10 µA
VCC = Max, VIN = GND, I/O = High Z
VCC = Max, VIN = GND, I/O = High Z
VCC = Max, VIN = VCC, I/O = High Z
VCC = 5V, VO = 0.5V, TA = 25°C
-5
VIN = 0V or VCC,
f = 25 MHz
All Outputs disabled4
-7
-10
-15
-25
TA = 25°C, VCC = 5.0V
@ f = 1 MHz
Min
2.4
VCC - 0.3
2.0
-0.3
0 (Typical)
-30
Max
0.5
0.15
VCC + 0.3
0.8
-10
Unit
V
V
V
V
V
V
µA
-100
40
-135
90
90
110/115
45/55
37/50
6
12
µA
µA
mA
mA
pF
pF
6 04-02-004H

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