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PEB20324 Schematic ( PDF Datasheet ) - Infineon Technologies AG

Teilenummer PEB20324
Beschreibung ICs for Communications
Hersteller Infineon Technologies AG
Logo Infineon Technologies AG Logo 




Gesamt 30 Seiten
PEB20324 Datasheet, Funktion
ICs for Communications
Multichannel Network Interface Controller for HDLC + Extensions
MUNICH128X
PEB 20324 Version 2.2
Hardware Reference Manual 04.99
DS 1






PEB20324 Datasheet, Funktion
PEB 20324
PEF 20324
List of Tables
Page
Table 2-1
Table 2-2
Table 2-3
Table 2-4
Table 2-5
Table 2-6
Table 2-7
Table 2-8
Table 5-1
Table 5-2
Table 5-3
Table 5-4
Table 5-5
Table 5-6
Table 5-7
Table 5-8
Table 5-9
Table 5-10
Table 5-11
Table 5-12
Table 5-13
Table 6-1
Table 6-2
Pin Descriptions by Functional Block: Port 0 Serial Interface . . . . . . . 17
Pin Descriptions by Functional Block: Port 1 Serial Interface . . . . . . . 18
Pin Descriptions by Functional Block: Port 2 Serial Interface . . . . . . . 19
Pin Descriptions by Functional Block: Port 3 Serial Interface . . . . . . . 20
Pin Descriptions by Functional Block: PCI Interface . . . . . . . . . . . . . . 21
Pin Descriptions by Functional Block:
DEMUX Interface (additional signals to PCI Interface) . . . . . . . . . . . . 25
Pin Descriptions by Functional Block: Power Supply. . . . . . . . . . . . . . 26
Pin Descriptions by Functional Block: Test Interface . . . . . . . . . . . . . . 27
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Thermal Package Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Non-PCI Interface Pins
TA = 0 to + 70×C; VDD5 = 5 V ± 5%, VDD3 = 3.3 V ± 0.3 V,
VSS = 0 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
Non-PCI Interface Pins
TA = 25×C; VDD5 = 5 V ± 5%, VDD3 = 3.3 V ± 0.3 V, VSS = 0 V . . . 42
PCI Input and Output Measurement Conditions . . . . . . . . . . . . . . . . . 44
Number of Wait States Inserted by the MUNICH128X as Initiator. . . . 48
Number of Wait States Inserted by the MUNICH128X as Slave . . . . . 48
PCI Clock Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
PCI Interface Signal Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 50
Additional De-multiplexed Interface Signal Characteristics . . . . . . . . . 52
PCM Serial Interface Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
System Interface Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
JTAG-Boundary Scan Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
Boundary Scan Sequence in MUNICH128X . . . . . . . . . . . . . . . . . . . . 58
Boundary Scan Test Modes. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
Hardware Reference Manual
6
04.99

6 Page









PEB20324 pdf, datenblatt
PEB 20324
PEF 20324
Introduction
1.3 Typical Applications
The MUNICH128X provides protocol processing and host memory buffer management
for four independent T1/E1 PRI ports. As such, the MUNICH128X fits into a system
between the framer or LIU/framer devices (e.g., the Siemens FALC®54/FALC®54-LH
transceiver) and the host bus (e.g. PCI Bus), as illustrated in Figure 1-3.
The MUNICH128X provides four independent Serial PCM ports which connect directly
into the framer devices. In PCI based systems a dedicated microcontroller or PCI bridge
chip is necessary to configure the framer or LIU/framer devices.
Additionally, the MUNICH128X provides a PCI 2.1 interface which connects directly to
the system PCI bus. Optionally, this bus can be configured in De-multiplexed Mode.
T1/E1/PRI
FALC R 54 /
FALC R -LH
Transceiver
T1/E1/PRI
FALC R 54 /
FALC R -LH
Transceiver
T1/E1/PRI
FALC R 54 /
FALC R -LH
Transceiver
T1/E1/PRI
FALC R 54 /
FALC R -LH
Transceiver
Dedicated
CPU
MUNICH128X
PCI BUS
PCI Bridge
Chip
Host
Memory
Processor
ITS10009
Figure 1-3 System Integration of the MUNICH128X in PCI-Based System
Hardware Reference Manual
12
04.99

12 Page





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