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PEB20321 Schematic ( PDF Datasheet ) - Infineon Technologies AG

Teilenummer PEB20321
Beschreibung Multichannel Network Interface Controller for HDLC
Hersteller Infineon Technologies AG
Logo Infineon Technologies AG Logo 




Gesamt 30 Seiten
PEB20321 Datasheet, Funktion
Data Sheet, DS2, Feb. 2001
MUNICH32X
Multichannel Network
Controller for HDLC
PEB 20321 Version 2.2
PEF 20321 Version 2.2
Interface
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PEB20321 Datasheet, Funktion
PEB 20321
PEF 20321
register.
Chapter 12, Host Memory Organization
This chapter contains information about the external data structures.
Chapter 13, Boundary Scan Unit
Chapter 14, Electrical Characteristics
Gives a detailed description of all electrical DC and AC characteristics and provides
timing diagrams and values for all interfaces.
Chapter 15, MUNICH32X Bus Utilization
Contains information about bus utilization on the PCI bus for different parameters.
Chapter 16, Package Outline
Your Comments
We welcome your comments on this document. We are continuously trying improving
our documentation. Please send your remarks and suggestions by e-mail to
Please provide in the subject of your e-mail:
device name (MUNICH32X), device number (PEB 20321 or PEF 20321), device version
(Version 2.2), and in the body of your e-mail:
document type (Data Sheet), issue date (2001-02-14) and document revision number
(DS2).
Data Sheet 6 2001-02-14

6 Page









PEB20321 pdf, datenblatt
PEB 20321
PEF 20321
List of Figures
Page
Figure 1
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Figure 14
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Figure 34
Figure 35
Figure 36
Figure 37
Figure 38
Figure 39
Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
MUNICH32X Logic Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
Functional Block Overview of MUNICH32X . . . . . . . . . . . . . . . . . . . . . 43
Block Diagram of MUNICH32X . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
General System Integration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
T1/DS1 Mode PCM Frame Timing 1.544 MHz . . . . . . . . . . . . . . . . . . 48
T1/DS1 Mode PCM Frame Timing 1.536 MHz . . . . . . . . . . . . . . . . . . 49
CEPT Mode PCM Frame Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
4.096 Mbit/s PCM Frame Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
8.192 Mbit/s PCM Frame Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
Example: Programmable Channel Allocation for 32 Time Slots . . . . . 53
Example: Programmable Channel Allocation for 24 Time Slots . . . . . 53
Example: Transmit Bit Shift Programming of 0 and -3 . . . . . . . . . . . . . 53
Multiplex Management Receive Direction . . . . . . . . . . . . . . . . . . . . . . 55
Multiplex Management Transmit Direction. . . . . . . . . . . . . . . . . . . . . . 56
Partitioning of TB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
Partitioning of RB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
Memory Division (Serial PCM Core) for up to four MUNICH32X . . . . . 59
HandlingofFEandHOLDCondition(VariableSizeFrameOrientedProtocols)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .62
Handling of E, S, X Changes (Fixed Size Frame Oriented Protocols) 64
Handling of FE Condition (Fixed Size Frame Oriented Protocols) . . 66
Handling of HOLD Condition (Fixed Size Frame Oriented Protocols) . 67
Handling of FE and HOLD Condition (Time Slot Oriented Protocol) . 69
Handling of TH Condition (Variable Size Frame Oriented Protocols) . 72
Handling of TH Condition (Fixed Size Frame Oriented Protocols). . . . 74
Handling of TH Condition (Time Slot Oriented Protocol) . . . . . . . . . . . 75
HandlingofTHandHOLDCondition(VariableSizeFrameOrientedProtocols)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .76
Handling of TH and HOLD Condition (Fixed Size Frame Oriented Protocols)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .78
Handling of TH and HOLD Condition (Time Slot Oriented Protocol) . 80
FNUM Reduction in HDLC Transmit Mode . . . . . . . . . . . . . . . . . . . . 84
Example of HDLC Transmit Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86
Receiver Interframe Time-Fill States in HDLC . . . . . . . . . . . . . . . . . . . 89
Example of HDLC Receive Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92
Example of HDLC Receive Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93
Example of HDLC Receive Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94
Example of HDLC Reception with CS = 0 . . . . . . . . . . . . . . . . . . . . . . 95
Example of HDLC Reception with CS = 0 . . . . . . . . . . . . . . . . . . . . . . 96
Example of TMB Transmission . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99
Example of TMB Reception . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102
Data Sheet 12 2001-02-14

12 Page





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