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PDF PCM1742 Data sheet ( Hoja de datos )
| Número de pieza | PCM1742 | |
| Descripción | 24-Bit/ 192kHz Sampling Enhanced Multilevel/ Delta-Sigma/ Audio DIGITAL-TO-ANALOG CONVERTER | |
| Fabricantes | Burr-Brown Corporation | |
| Logotipo |  |
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PCM1742
PCM1742
www.ti.com
24-Bit, 192kHz Sampling
Enhanced Multilevel, Delta-Sigma, Audio
DIGITAL-TO-ANALOG CONVERTER
FEATURES
q 24-BIT RESOLUTION
q ANALOG PERFORMANCE (VCC = +5V):
Dynamic Range: 106dB typ (PCM1742KE)
100dB typ (PCM1742E)
SNR: 106dB typ (PCM1742KE)
100dB typ (PCM1742E)
THD+N: 0.002% typ (PCM1742KE)
0.003% typ (PCM1742E)
Full-Scale Output: 3.1Vp-p typ
q 4x/8x OVERSAMPLING DIGITAL FILTER:
Stopband Attenuation: –55dB
Passband Ripple: ±0.03dB
q SAMPLING FREQUENCY: 5kHz to 200kHz
q SYSTEM CLOCK: 128, 192, 256, 384, 512,
768fS with Auto Detect
q ACCEPTS 16-, 18-, 20-, AND 24-BIT AUDIO
DATA
q DATA FORMATS: Standard, I2S, and Left-
Justified
q USER-PROGRAMMABLE MODE CONTROLS:
Digital Attenuation: 0dB to –63dB, 0.5dB/Step
Digital De-Emphasis
Digital Filter Roll-Off: Sharp or Slow
Soft Mute
Zero Flags for Each Output
q DUAL-SUPPLY OPERATION:
+5V Analog, +3.3V Digital
q 5V TOLERANT DIGITAL INPUTS
q SMALL SSOP-16 PACKAGE
q SAME PACKAGE SIZE AS SOP-8
APPLICATIONS
q AV RECEIVERS
q DVD MOVIE PLAYERS
q DVD ADD-ON CARDS FOR HIGH-END PCs
q DVD AUDIO PLAYERS
q HDTV RECEIVERS
q CAR AUDIO SYSTEMS
q OTHER APPLICATIONS REQUIRING 24-BIT
AUDIO
DESCRIPTION
The PCM1742 is a CMOS, monolithic, integrated circuit
which includes stereo Digital-to-Analog Converters
(DACs) and support circuitry in a small SSOP-16 package.
The data converters utilize Texas Instrument’s enhanced
multilevel delta-sigma architecture that employs fourth-
order noise shaping and 8-level amplitude quantization to
achieve excellent dynamic performance and improved toler-
ance to clock jitter. The PCM1742 accepts industry standard
audio data formats with 16- to 24-bit data, providing easy
interfacing to audio DSP and decoder chips. Sampling rates
up to 200kHz are supported. A full set of user-program-
mable functions are accessible through a 3-wire serial
control port that supports register write functions.
Copyright © 2000, Texas Instruments Incorporated
SBAS176
Printed in U.S.A. December, 2000
1 page  
TYPICAL PERFORMANCE CURVES
All specifications at TA = +25°C, VCC = 5.0V, VDD = 3.3V, system clock = 384fS (fS = 44.1kHz), and 24-bit input data, unless otherwise noted.
DIGITAL FILTER
Digital Filter (De-Emphasis Off)
0
–20
–40
–60
–80
–100
–120
–140
0
FREQUENCY RESPONSE (Sharp Roll-Off)
123
Frequency (x fS)
4
0.05
0.04
0.03
0.02
0.01
0
–0.01
–0.02
–0.03
–0.04
–0.05
0
FREQUENCY RESPONSE PASSBAND
(Sharp Roll-Off)
0.1 0.2 0.3
Frequency (x fS)
0.4
0.5
0
–20
–40
–60
–80
–100
–120
–140
0
FREQUENCY RESPONSE (Slow Roll-Off)
123
Frequency (x fS)
4
De-Emphasis
0.0
–1.0
–2.0
–3.0
–4.0
–5.0
–6.0
–7.0
–8.0
–9.0
–10.0
0
DE-EMPHASIS (fS = 32kHz)
2 4 6 8 10 12 14
Frequency (kHz)
PCM1742
SBAS176
5
4
3
2
1
0
–1
–2
–3
–4
–5
0
TRANSITION CHARACTERISTICS (Slow Roll-Off)
0.1 0.2 0.3
Frequency (x fS)
0.4
0.5
0.5
0.4
0.3
0.2
0.1
0.0
–0.1
–0.2
–0.3
–0.4
–0.5
0
DE-EMPHASIS ERROR (fS = 32kHz)
2 4 6 8 10 12 14
Frequency (kHz)
5
5 Page 
MODE CONTROL REGISTERS
User-Programmable Mode Controls
The PCM1742 includes a number of user-programmable
functions that are accessed via control registers. The regis-
ters are programmed using the Serial Control Interface that
was previously discussed in this data sheet. Table II lists the
available mode control functions, along with their reset
default conditions and associated register index.
Register Map
The mode control register map is shown in Table III. Each
register includes an index (or address) indicated by the
IDX[6:0] bits.
ML
tMLS
tMCH
tMCL
MC
tMCY
MD
tMDS
tMCH
tMHH
tMLH
LSB
50% of VDD
50% of VDD
50% of VDD
SYMBOL
PARAMETER
MIN
TYP
MAX UNITS
tMCY
tMCL
tMCH
tMHH
tMLS
tMLH
tMDH
tMDS
MC Pulse Cycle Time
MC Low Level Time
MC High Level Time
ML High Level Time
ML Falling Edge to MC Rising Edge
ML Hold Time(1)
MD Hold Time
MD Set Up Time
100
50
50
Note (2)
20
20
15
20
ns
ns
ns
ns
ns
ns
ns
ns
3
NOTES: (1) MC rising edge for LSB to ML rising edge. (2) 256 • f S sec (min), fS = Sampling Rate.
FIGURE 7. Control Interface Timing.
FUNCTION
Digital Attenuation Control, 0dB to –63dB in 0.5dB Steps
Soft Mute Control
Oversampling Rate Control (64 or 128fS)
DAC Operation Control
De-Emphasis Function Control
De-Emphasis Sample Rate Selection
Audio Data Format Control
Digital Filter Roll-Off Control
Zero Flag Function Select
Output Phase Select
Zero Flag Polarity Select
TABLE II. User-Programmable Mode Controls.
RESET DEFAULT
0dB, No Attenuation
Mute Disabled
64fS Oversampling
DAC1 and DAC2 Enabled
De-Emphasis Disabled
44.1kHz
24-Bit Left Justified
Sharp Roll-Off
L-/R-Channel Independent
Normal Phase
High
CONTROL REGISTER
16 and 17
18
18
19
19
19
20
20
22
22
22
INDEX, IDX[6:0]
AT1[7:0], AT2[7:0]
MUT[2:0]
OVER
DAC[2:1]
DM12
DMF[1:0]
FMT[2:0]
FLT
AZRO
DREV
ZREV
IDX
(B8-B14) REGISTER B15 B14
B13 B12
10H 16 0 IDX6 IDX5 IDX4
11H 17 0 IDX6 IDX5 IDX4
12H 18 0 IDX6 IDX5 IDX4
13H 19 0 IDX6 IDX5 IDX4
14H 20 0 IDX6 IDX5 IDX4
15H 21 0 IDX6 IDX5 IDX4
16H 22 0 IDX6 IDX5 IDX4
TABLE III. Mode Control Register Map.
B11
IDX3
IDX3
IDX3
IDX3
IDX3
IDX3
IDX3
B10
IDX2
IDX2
IDX2
IDX2
IDX2
IDX2
IDX2
B9
IDX1
IDX1
IDX1
IDX1
IDX1
IDX1
IDX1
B8
IDX0
IDX0
IDX0
IDX0
IDX0
IDX0
IDX0
B7 B6 B5 B4 B3 B2 B1 B0
AT17
AT27
RSV
RSV
RSV
RSV
RSV
AT16
AT26
OVER
DMF1
RSV
RSV
RSV
AT15
AT25
RSV
DMF0
FLT
RSV
RSV
AT14
AT24
RSV
DM12
RSV
RSV
RSV
AT13
AT23
RSV
RSV
RSV
RSV
RSV
AT12
AT22
RSV
RSV
FMT2
RSV
AZRO
AT11
AT21
MUT2
DAC2
FMT1
RSV
ZREV
AT10
AT20
MUT1
DAC1
FMT0
RSV
DREV
PCM1742
SBAS176
11
11 Page | ||
| Páginas | Total 22 Páginas | |
| PDF Descargar | [ Datasheet PCM1742.PDF ] | |
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