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PDF PCM1606 Data sheet ( Hoja de datos )
| Número de pieza | PCM1606 | |
| Descripción | 24-BIT/ 192-kHz SAMPLING/ 6-CHANNEL/ ENHANCED MULTILEVEL/ DELTA-SIGMA DIGITAL-TO-ANALOG CONVERTER | |
| Fabricantes | Burr-Brown Corporation | |
| Logotipo |  |
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PCM1606
SLES014B – OCTOBER 2001 – REVISED AUGUST 2002
24-BIT, 192-kHz SAMPLING, 6-CHANNEL, ENHANCED MULTILEVEL,
DELTA-SIGMA DIGITAL-TO-ANALOG CONVERTER
FEATURES
D 24-Bit Resolution
D Analog Performance:
– Dynamic Range: 103 dB, Typical
– SNR: 103 dB, Typical
– THD+N: 0.004%, Typical
– Full-Scale Output: 3.1 Vp-p, Typical
D 8× Oversampling Interpolation Filter:
– Stopband Attenuation: –55 dB
– Passband Ripple: ±0.03 dB
D Sampling Frequency:
– 5 kHz to 200 kHz (Channels 1 and 2)
– 5 kHz to 100 kHz (Channels 3, 4, 5, and 6)
D Accepts 16- and 24-Bit Audio Data
D Data Formats: Standard, I2S, and
Left-Justified, TDM
D System Clock: 128 fS, 192 fS, 256 fS, 384 fS,
512 fS, or 768 fS
D Digital De-Emphasis for 32 kHz, 44.1 kHz,
48 kHz
D Power Supply: 5-V Single Supply
D 20 -Lead SSOP Package
APPLICATIONS
D Integrated A/V Receivers
D DVD Movie and Audio Players
D HDTV Receivers
D Car Audio Systems
D DVD Add-On Cards for High-End PCs
D Digital Audio Workstations
D Other Multichannel Audio Systems
DESCRIPTION
The PCM1606 is a CMOS monolithic integrated circuit
that features six 24-bit audio digital-to-analog
converters and support circuitry in a small 20-lead
SSOP package. The digital-to-analog converters utilize
Texas Instruments’ enhanced multilevel, delta-sigma
architecture, which employs 2nd-order noise shaping
and 8-level amplitude quantization to achieve excellent
signal-to-noise performance and a high tolerance to
clock jitter.
The PCM1606 accepts industry-standard audio data
formats with 16- to 24-bit audio data. Sampling rates up
to 200 kHz are supported.
DATA1
DATA2
DATA3
FMT1
FMT0
ZEROA
AGND
VOUT5
VOUT6
VOUT1
PCM1606
(TOP VIEW)
1 20
2 19
3 18
4 17
5 16
6 15
7 14
8 13
9 12
10 11
SCKI
BCK
LRCK
DEMP1
DEMP0
VCC
VCOM
VOUT4
VOUT3
VOUT2
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright 2002, Texas Instruments Incorporated
www.ti.com
1
1 page  
PCM1606
SLES014B – OCTOBER 2001 – REVISED AUGUST 2002
electrical characteristics, all specifications at TA = 25°C, VCC = 5 V, fS = 44.1 kHz,
system clock = 384 fS and 24-bit data (unless otherwise noted) (continued)
PARAMETER
TEST CONDITIONS
PCM1606E
MIN TYP
UNIT
MAX
DIGITAL FILTER PERFORMANCE
FILTER CHARACTERISTICS
Passband
Stopband
Passband ripple
±0.03 dB
–3 dB
0.546 fS
0.454 fS
0.487 fS
±0.03 dB
Stopband attenuation
ANALOG FILTER PERFORMANCE
Stopband = 0.546 fS
Stopband = 0.567 fS
–50
–55
dB
Frequency response
At 20 kHz
–0.03
dB
POWER SUPPLY REQUIREMENTS (see Note 4)
VCC
Voltage range
ICC Supply current
Power dissipation
TEMPERATURE RANGE
fS = 44.1 kHz/384 fS
fS = 96 kHz/256 fS
fS = 192 kHz/128 fS
fS = 44.1 kHz/384 fS
fS = 96 kHz/256 fS
fS = 192 kHz/128 fS
4.5 5
50
72
68
250
360
340
5.5 VDC
65
mA
358
mW
Operation temperature
–25 85 °C
θJA
NOTES:
Thermal resistance
20-pin SSOP
115 °C/W
3. Analog performance specs are tested using System Two Cascade Plus by Audio Precision with 400-Hz HPF, 30-kHz LPF on at RMS
with 20-kHz LPF, 400-Hz HPF in calculation.
Shibasoku #725 THD meter, 400 Hz HPF, 30 kHz LPF on, at average mode with 20-kHz bandwidth limiting. The load connected
to the analog output is 5 kΩ or larger via capacitance coupling.
4. Condition in 192-kHz operation is channel 3 through channel 6 are disabled.
timing requirements
system clock input
The PCM1606 requires a system clock for operating the digital interpolation filters and multilevel delta-sigma
modulators. The system clock is applied at the SCKI (pin 20). Table 1 shows examples of system clock
frequencies for common audio sampling rates.
Figure 1 shows the timing requirements for the system clock input. For optimal performance, it is important to
use a clock source with low phase jitter and noise. Texas Instruments’ PLL1700 multiclock generator is an
excellent choice for providing the PCM1606 system clock source.
The 192-kHz sampling frequency operation is available on DATA1 for VOUT1 and VOUT2. When the system clock
of 128 fS or 192 fS is detected, VOUT3, VOUT4, VOUT5 and VOUT6 are automatically forced to the bipolar zero
level (= 0.5 VCC). Table 1 lists the typical system clock frequency.
www.ti.com
5
5 Page 
PCM1606
timing requirements (continued)
(4) TDM Data Format
BCK = 256 fS
LRCK
BCK
Channel 1
32 BCK
Channel 2
32 BCK
1/fS
Channel 3
123
MSB
22 23 24 LOW Fix 1
LSB
24 LOW Fix
SLES014B – OCTOBER 2001 – REVISED AUGUST 2002
Channel 6
LOW Fix 64 Bit 1 2
BCK = 128 fS
LRCK
BCK
Channel 1
32 BCK
Channel 2 1/fS
32 BCK
123
MSB
22 23 24 LOW Fix 1
LSB MSB
24 LOW Fix
LSB
LOW Fix 64 Bit
12
BCK = 512 fS
LRCK
BCK
Channel 1
1/fS
Channel 2
Channel 3
Channel 6
64 BCK
64 BCK
12
MSB
LOW Fix
24 LOW Fix
1
LSB
Figure 6. Audio Data Input Format (Continued)
LOW Fix
1
functional description
The PCM1606 has several built-in functions including digital input data format selection and digital
de-emphasis. These functions are hardware controlled with static control signals and used on pin FMT1 (pin 4),
pin FMT0 (pin 5), pin DEMP1 (pin 17), and DEMP0 (pin 16).
data format selection
The PCM audio data format can be selected by pin FMT1 (pin 4) and FMT0 (pin 5) as shown in Table 4.
Table 4. Data Format Control
FMT1 (pin 4)
LOW
LOW
HIGH
HIGH
FMT0 (pin 5)
LOW
HIGH
LOW
HIGH
AUDIO INTERFACE
I2S
TDM
Standard
Left-justified
www.ti.com
11
11 Page | ||
| Páginas | Total 27 Páginas | |
| PDF Descargar | [ Datasheet PCM1606.PDF ] | |
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