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PCK2011 Schematic ( PDF Datasheet ) - NXP Semiconductors

Teilenummer PCK2011
Beschreibung Direct RAMbus Clock Generator
Hersteller NXP Semiconductors
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Gesamt 11 Seiten
PCK2011 Datasheet, Funktion
INTEGRATED CIRCUITS
PCK2011
Direct RAMbus Clock Generator
Preliminary specification
1999 Jan 19
Philips
Semiconductors






PCK2011 Datasheet, Funktion
Philips Semiconductors
Direct RambusClock Generator
Preliminary specification
PCK2011
Pclk
SynClk
Pclk/M =
SynClk/N
Figure 3. Gear Ratio Timing Diagram
SW00292
PHYSICAL SPECIFICATION
General Requirements
The clock source generates differential signals with specified jitter,
voltage levels, duty cycle, and rise/fall times. Figure 5 shows the
clock equivalent circuit.
ZCH
RT = ZCH
CHANNEL
ZCH
RT = ZCH
SW00291
Figure 4. Equivalent Circuit
The driver produces a specified voltage swing on the Channel. The
nominal value of the Channel impedance, Z CH , is 28 ohms.
In order to reduce signal attenuation and EMI, clock signal rise/fall
times are controlled to within specifications. In addition, DRCG is
able to receive input signals that are generated from different
voltage power supplies. The phase detector signals come from the
controller. The controller output voltage supply is connected to the
pin VddIPD of DRCG, and is used as the reference for the
two-phase detector input signals, PclkM and SynClkN. The output
voltage supply is also used as the reference for the output
enable/disable signal, StopB.
The reference clock comes from the main clock source chip. The
main clock source output voltage supply is connected to the pin
VddIR of DRCG, and is used as the reference for the Refclk input
signal.
Clock Jitter
The short-term jitter specification (over four cycles) for the clock
source is under 100 ps maximum. Jitter is measured using a jitter
measurement system that provides flexibility for measuring
cycle-cycle jitter as a function of cycle count.
Clock Source Specification
Rambus clock sources meet the output specifications listed in
Table 4 when characterized under the operating conditions listed in
Table 3.
1999 Jan 19
6

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