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WS57C71C-45T Schematic ( PDF Datasheet ) - STMicroelectronics

Teilenummer WS57C71C-45T
Beschreibung HIGH SPEED 32K x 8 CMOS PROM/RPROM
Hersteller STMicroelectronics
Logo STMicroelectronics Logo 




Gesamt 7 Seiten
WS57C71C-45T Datasheet, Funktion
WS57C71C
HIGH SPEED 32K x 8 CMOS PROM/RPROM
Ultra-Fast Access Time
— 35 ns
Low Power Consumption
Fast Programming
KEY FEATURES
Immune to Latch-UP
— Up to 200 mA
ESD Protection Exceeds 2000V
Available in 300 Mil DIP and PLDCC
GENERAL DESCRIPTION
The WS57C71C is a High Performance 256K UV Erasable Electrically Re-Programmable Read Only Memory
(RPROM). It is manufactured in an advanced CMOS technology and utilizes WSI's patented self-aligned split gate
EPROM cell.
The industry standard PROM pin configuration of the WS57C71C provides an easy upgrade path from a 16K x 8
device.
This RPROM is capable of operating at speeds as fast as 35 ns address access time, which enables it to be used
directly with today's fast microprocessors and DSP processors without introducing any wait states. All inputs and
outputs are TTL compatible. The WS57C71C is a low power device even when operated at its fastest speed. The
DIP version is packaged in a 300 mil wide DIP package saving board space for the user.
BLOCK DIAGRAM
9
A6 - A14
ROW
ADDRESSES
ROW
DECODER
EPROM ARRAY
262,144 BITS
9
A0 - A5
COLUMN
ADDRESSES
CS1/ VPP
CS2
CS3
COLUMN
DECODER
SENSE
AMPLIFIERS
8
OUTPUTS
PIN CONFIGURATION
TOP VIEW
Chip Carrier
CERDIP
A9 1
A6
4
5
3
2
1
32 31 30
29
A12
A8 2
A7 3
A5 6
28 A13
A6 4
A4
A3
A2
A1
A0
NC
O0
7 27
8 26
9 25
10 24
11 23
12 22
13 21
14 15 16 17 18 19 20
A14
NC
CS3
CS2
CS1/VPP
O7
O6
A5 5
A4 6
A3 7
A2 8
A1 9
A0 10
O0 11
O1 12
O2 13
O1 O2 NC O3 O4 O5
GND 14
28 VCC
27 A10
26 A11
25 A12
24 A13
23 A14
22 CS3
21 CS2
20 CS1/VPP
19 O7
18 O6
17 O5
16 O4
15 O3
PRODUCT SELECTION GUIDE
PARAMETER
Address Access Time (Max)
CS to Output Valid Time (Max)
WS57C71C-35
35 ns
15 ns
WS57C71C-45
45 ns
20 ns
WS57C71C-55
55 ns
20 ns
WS57C71C-70
70 ns
30 ns
Return to Main Menu
2-55






WS57C71C-45T Datasheet, Funktion
WS57C71C
PROGRAMMING INFORMATION
DC CHARACTERISTICS (TA = 25 ± 5°C, VCC = 6.25 V ± 0.25 V, VPP = 12.75 ± 0.25 V)
SYMBOLS
PARAMETER
MIN MAX
ILI
Input Leakage Current
(VIN = VCC or Gnd)
IPP
VPP Supply Current During
Programming Pulse
ICC VCC Supply Current
VOL
Output Low Voltage During Verify
(IOL = 16 mA)
VOH
Output High Voltage During Verify
(IOH = –4 mA)
–10 10
60
25
0.45
2.4
NOTE: 7. VPP must not be greater than 13 volts including overshoot.
AC CHARACTERISTICS (TA = 25 ± 5°C, VCC = 6.25 V ± 0.25 V, VPP = 12.75 ± 0.25 V)
SYMBOLS
PARAMETER
MIN TYP MAX
tAS Address Setup Time
tDF Chip Disable Setup Time
tDS Data Setup Time
tPW Program Pulse Width
tDH Data Hold Time
tCS Chip Select Delay
tRF VPP Rise and Fall Time
2
2
100
2
1
30
200
30
PROGRAMMING WAVEFORM
UNITS
µA
mA
mA
V
V
UNITS
µs
ns
µs
µs
µs
ns
µs
VIH
ADDRESSES
VIL
VIH
VIL
VPP
VIH
CS1/VPP VIL
VIH
CS2
VIL
VIH
CS3
VIL
tDF
tAS
tDS
ADDRESS STABLE
DATA IN
tPW
tDH
tRF tRF
DON'T CARE
DATA OUT
tCS
2-60

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