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WM8978 Schematic ( PDF Datasheet ) - Wolfson Microelectronics plc

Teilenummer WM8978
Beschreibung STEREO CODEC WITH SPEAKER DRIVER
Hersteller Wolfson Microelectronics plc
Logo Wolfson Microelectronics plc Logo 




Gesamt 30 Seiten
WM8978 Datasheet, Funktion
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WM8978
Stereo CODEC with Speaker Driver
DESCRIPTION
FEATURES
The WM8978 is a low power, high quality stereo CODEC
designed for portable applications such as multimedia phone,
digital still camera or digital camcorder.
The device integrates preamps for stereo differential mics, and
includes drivers for speakers, headphone and differential or
stereo line output. External component requirements are
reduced as no separate microphone or headphone amplifiers
are required.
Advanced on-chip digital signal processing includes a 5-band
equaliser, a mixed signal Automatic Level Control for the
microphone or line input through the ADC as well as a purely
digital limiter function for record or playback. Additional digital
filtering options are available in the ADC path, to cater for
application filtering such as ‘wind noise reduction’.
The WM8978 digital audio interface can operate as a master or
a slave. An internal PLL can generate all required audio clocks
for the CODEC from common reference clock frequencies, such
as 12MHz and 13MHz.
The WM8978 operates at analogue supply voltages from 2.5V to
3.3V, although the digital core can operate at voltages down to
1.71V to save power. The speaker outputs and OUT3/4 line
outputs can run from a 5V supply if increased output power is
required. Individual sections of the chip can also be powered
down under software control.
Stereo CODEC:
DAC SNR 98dB, THD -84dB (‘A’ weighted @ 48kHz)
ADC SNR 95dB, THD -84dB (‘A’ weighted @ 48kHz)
On-chip Headphone Driver with ‘capless’ option
- 40mW per channel into 16/ 3.3V SPKVDD
1W output power into 8BTL speaker / 5V SPKVDD
- Capable of driving piezo speakers
- Stereo speaker drive configuration
Mic Preamps:
Stereo Differential or mono microphone Interfaces
- Programmable preamp gain
- Psuedo differential inputs with common mode
rejection
- Programmable ALC / Noise Gate in ADC path
Low-noise bias supplied for electret microphones
Other Features:
Enhanced 3-D function for improved stereo separation
Digital playback limiter
5-band Equaliser (record or playback)
Programmable ADC High Pass Filter (wind noise reduction)
Programmable ADC Notch Filter
Aux inputs for stereo analogue input signals or ‘beep’
On-chip PLL supporting 12, 13, 19.2MHz and other clocks
Support for 8, 11.025, 12, 16, 22.05, 24, 32, 44.1 and
48kHz sample rates
Low power, low voltage
- 2.5V to 3.6V (digital: 1.71V to 3.6V)
5x5mm 32-lead QFN package
APPLICATIONS
BLOCK DIAGRAM
Stereo Camcorder or DSC
Multimedia Phone
WOLFSON MICROELECTRONICS plc
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Production Data, October 2011, Rev 4.5
Copyright 2011 Wolfson Microelectronics plc






WM8978 Datasheet, Funktion
WM8978
Production Data
ABSOLUTE MAXIMUM RATINGS
Absolute Maximum Ratings are stress ratings only. Permanent damage to the device may be caused by continuously
operating at or beyond these limits. Device functional operating limits and guaranteed performance specifications are given
under Electrical Characteristics at the test conditions specified.
ESD Sensitive Device. This device is manufactured on a CMOS process. It is therefore generically susceptible
to damage from excessive static voltages. Proper ESD precautions must be taken during handling and storage
of this device.
Wolfson tests its package types according to IPC/JEDEC J-STD-020B for Moisture Sensitivity to determine acceptable storage
conditions prior to surface mount assembly. These levels are:
MSL1 = unlimited floor life at <30C / 85% Relative Humidity. Not normally stored in moisture barrier bag.
MSL2 = out of bag storage for 1 year at <30C / 60% Relative Humidity. Supplied in moisture barrier bag.
MSL3 = out of bag storage for 168 hours at <30C / 60% Relative Humidity. Supplied in moisture barrier bag.
The Moisture Sensitivity Level for each package type is specified in Ordering Information.
CONDITION
DBVDD, DCVDD, AVDD supply voltages
SPKVDD supply voltage
Voltage range digital inputs
Voltage range analogue inputs
Operating temperature range, TA
Storage temperature after soldering
MIN
-0.3V
-0.3V
DGND -0.3V
AGND -0.3V
-40C
-65C
Notes:
1. Analogue and digital grounds must always be within 0.3V of each other.
2. All digital and analogue supplies are completely independent from each other.
MAX
+4.5V
+7V
DVDD +0.3V
AVDD +0.3V
+100C
+150C
RECOMMENDED OPERATING CONDITIONS
PARAMETER
Digital supply range (Core)
Digital supply range (Buffer)
Analogue core supply range
Analogue output supply range
Ground
SYMBOL
DCVDD
DBVDD
AVDD
SPKVDD
DGND, AGND,
SPKGND
TEST
CONDITIONS
MIN
1.711
1.712
2.5
2.5
TYP
0
Notes:
1. When using the PLL, DCVDD must not be less than 1.9V.
2. DBVDD must be greater than or equal to DCVDD.
3. Analogue supplies have to be to digital supplies.
4. In non-boosted mode, SPKVDD should = AVDD, if boosted SPKVDD should be 1.5x AVDD.
MAX
3.6
3.6
3.6
5.5
UNIT
V
V
V
V
V
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PD, Rev 4.5, October 2011
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WM8978 pdf, datenblatt
WM8978
Production Data
POWER CONSUMPTION
Typical current consumption for various scenarios is shown below.
MODE
AVDD
DCVDD
(3.0V)
(1.8V)
(mA)
(mA)
Off
0.043
0.0008
Sleep (VREF maintained, no clocks)
Stereo Record (8kHz)2
Stereo 16HP Playback (44.1kHz, quiescent)2
Stereo 16HP Playback (44.1kHz, white noise)2
Stereo 16HP Playback (44.1kHz, sine wave)2
0.04
0.0008
4.1 1.0
3.3 6.2
5.4 7.3
18 6.7
Notes:
1. DBVDD Current will increase with greater loading on digital I/O pins.
2. 5 Band EQ is enabled.
3. AVDD standby current will fall to nearer 15uA when thermal shutdown sensor is disabled.
Table 1 Power Consumption
DBVDD1
(3.0V)
(mA)
<0.0001
<0.0001
0.001
0.004
0.004
0.004
TOTAL
POWER
(mW)
0.12
0.12
14.1
21.1
29.4
66.1
ESTIMATING SUPPLY CURRENT
When either the DAC or ADC is enabled approximately 7mA will be drawn from DCVDD when
DCVDD=1.8V and fs=48kHz. When the PLL is enabled approximately 1.5mA additional current will
be drawn from DCVDD.
As a general rule, digital supply currents will scale in proportion to sample rates. Supply current for
analogue and digital blocks will also be lower at lower supply voltages.
Power consumed by the output drivers will depend greatly on the signal characteristics. A quiet
signal, or a signal with long periods of silence will consume less power than a signal which is
continuously loud.
Estimated supply current for the analogue blocks is shown in Table 2. Note that power dissipated in
the load is not shown.
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PD, Rev 4.5, October 2011
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