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WM8973 Schematic ( PDF Datasheet ) - Wolfson Microelectronics plc

Teilenummer WM8973
Beschreibung STEREO CODEC FOR PORTABLE AUDIO APPLICATIONS
Hersteller Wolfson Microelectronics plc
Logo Wolfson Microelectronics plc Logo 




Gesamt 30 Seiten
WM8973 Datasheet, Funktion
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WM8973L
Stereo CODEC for Portable Audio Applications
DESCRIPTION
The WM8973L is a low power, high quality stereo CODEC
designed for portable digital audio applications.
The device integrates complete interfaces to stereo or mono
microphones and a stereo headphone. External component
requirements are drastically reduced as no separate
microphone or headphone amplifiers are required.
Advanced on-chip digital signal processing performs
graphic equaliser, 3-D sound enhancement and automatic
level control for the microphone or line input.
The WM8973L can operate as a master or a slave, with
various master clock frequencies including 12 or 24MHz for
USB devices, or standard 256fs rates like 12.288MHz and
24.576MHz. Different audio sample rates such as 96kHz,
48kHz, 44.1kHz are generated directly from the master
clock without the need for an external PLL.
The WM8973L operates at supply voltages down to 1.8V,
although the digital core can operate at voltages down to
1.42V to save power, and the maximum for all supplies is
3.6 Volts. Different sections of the chip can also be powered
down under software control.
The WM8973L is supplied in a very small and thin 5x5mm
QFN package, ideal for use in hand-held and portable
systems.
BLOCK DIAGRAM
FEATURES
DAC SNR 98dB (‘A’ weighted), THD –84dB at 48kHz, 3.3V
ADC SNR 95dB (‘A’ weighted), THD -82dB at 48kHz, 3.3V
Complete Stereo / Mono Microphone Interface
- Programmable ALC / Noise Gate
On-chip 400mW BTL Speaker Driver (mono)
On-chip Headphone Driver
- >40mW output power on 16/ 3.3V
- THD –80dB at 20mW, SNR 90dB with 16load
- No DC blocking capacitors required (capless mode)
Separately mixed mono output
Digital Graphic Equaliser
Low Power
- 7mW stereo playback (1.8V / 1.5V supplies)
- 14mW record & playback (1.8V / 1.5V supplies)
Low Supply Voltages
- Analogue 1.8V to 3.6V
- Digital core: 1.42V to 3.6V
- Digital I/O: 1.8V to 3.6V
256fs / 384fs or USB master clock rates: 12MHz, 24MHz
Audio sample rates: 8, 11.025, 16, 22.05, 24, 32, 44.1, 48,
88.2, 96kHz generated internally from master clock
5x5x0.9mm QFN package
APPLICATIONS
MP3 Player / Recorder
AAC/WMA/Multi-Format Player / Recorder
Minidisc Player / Recorder
Portable Digital Music Systems
WOLFSON MICROELECTRONICS plc
www.wolfsonmicro.com
Advanced Information, July 2004, Rev 3.2
Copyright 2004 Wolfson Microelectronics plc






WM8973 Datasheet, Funktion
WM8973L
Advanced Information
ABSOLUTE MAXIMUM RATINGS
Absolute Maximum Ratings are stress ratings only. Permanent damage to the device may be caused by continuously
operating at or beyond these limits. Device functional operating limits and guaranteed performance specifications are given
under Electrical Characteristics at the test conditions specified.
ESD Sensitive Device. This device is manufactured on a CMOS process. It is therefore generically susceptible
to damage from excessive static voltages. Proper ESD precautions must be taken during handling and storage
of this device.
Wolfson tests its package types according to IPC/JEDEC J-STD-020B for Moisture Sensitivity to determine acceptable storage
conditions prior to surface mount assembly. These levels are:
MSL1 = unlimited floor life at <30°C / 85% Relative Humidity. Not normally stored in moisture barrier bag.
MSL2 = out of bag storage for 1 year at <30°C / 60% Relative Humidity. Supplied in moisture barrier bag.
MSL3 = out of bag storage for 168 hours at <30°C / 60% Relative Humidity. Supplied in moisture barrier bag.
The Moisture Sensitivity Level for each package type is specified in Ordering Information.
CONDITION
Supply voltages
Voltage range digital inputs
Voltage range analogue inputs
Operating temperature range, TA
Storage temperature after soldering
MIN
-0.3V
DGND -0.3V
AGND -0.3V
-25°C
-65°C
Notes
1. Analogue and digital grounds must always be within 0.3V of each other.
2. All digital and analogue supplies are completely independent from each other.
3. DCVDD must be less than or equal to AVDD & DBVDD.
MAX
+3.63V
DBVDD +0.3V
AVDD +0.3V
+85°C
+150°C
RECOMMENDED OPERATION CONDITIONS
PARAMETER
Digital supply range (Core)
Digital supply range (Buffer)
Analogue supplies range
Ground
SYMBOL
MIN
TYP
MAX
UNIT
DCVDD
1.42 2.0
3.6
V
DBVDD
1.8 2.0 3.6
V
AVDD, HPVDD
1.8 2.0 3.6
V
DGND,AGND, HPGND
0
V
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AI Rev 3.2 July 2004
6

6 Page









WM8973 pdf, datenblatt
WM8973L
SIGNAL TIMING REQUIREMENTS
SYSTEM CLOCK TIMING
MCLK
tMCLKL
tMCLKH
tMCLKY
Advanced Information
Figure 1 System Clock Timing Requirements
Test Conditions
CLKDIV2=0, DCVDD = 1.42V, DBVDD = 3.3V, DGND = 0V, TA = +25oC, Slave Mode fs = 48kHz, MCLK = 384fs, 24-bit data,
unless otherwise stated.
PARAMETER
SYMBOL
MIN TYP MAX UNIT
System Clock Timing Information
MCLK System clock pulse width high
MCLK System clock pulse width low
MCLK System clock cycle time
TMCLKL
TMCLKH
TMCLKY
21
21
54
ns
ns
ns
MCLK duty cycle
TMCLKDS
60:40
40:60
Test Conditions
CLKDIV2=1, DCVDD = 1.42V, DBVDD = 3.3V, DGND = 0V, TA = +25oC, Slave Mode fs = 48kHz, MCLK = 384fs, 24-bit data,
unless otherwise stated.
PARAMETER
SYMBOL
MIN TYP MAX UNIT
System Clock Timing Information
MCLK System clock pulse width high
TMCLKL
10
ns
MCLK System clock pulse width low
TMCLKH
10
ns
MCLK System clock cycle time
TMCLKY
27
ns
AUDIO INTERFACE TIMING – MASTER MODE
BCLK
(Output)
ADCLRC/
DACLRC
(Outputs)
ADCDAT
tDL
tDDA
DACDAT
tDST
tDHT
Figure 2 Digital Audio Data Timing – Master Mode (see Control Interface)
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AI Rev 3.2 July 2004
12

12 Page





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