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WM8775 Schematic ( PDF Datasheet ) - Wolfson Microelectronics plc

Teilenummer WM8775
Beschreibung 24 BIT 96 KHZ ADC WITH 4 CHANNEL I/P MULTIPLEXER
Hersteller Wolfson Microelectronics plc
Logo Wolfson Microelectronics plc Logo 




Gesamt 30 Seiten
WM8775 Datasheet, Funktion
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WM8775
24-bit, 96kHz ADC with 4 Channel I/P Multiplexer
DESCRIPTION
The WM8775 is a high performance, stereo audio ADC
with a 4 channel input mixer. The WM8775 is ideal for
digitising multiple analogue sources for surround sound
processing applications for home hi-fi, automotive and
other audio visual equipment.
A stereo 24-bit multi-bit sigma delta ADC is used with a
four stereo channel input selector. Each channel has
programmable gain control. Digital audio output word
lengths from 16-32 bits and sampling rates from 32kHz
to 96kHz are supported.
The audio data interface supports I2S, left justified, right
justified and DSP digital audio formats.
The device is controlled via a 2 or 3 wire serial interface.
The interface provides access to all features including
channel selection, volume controls, mutes, de-emphasis
and power management facilities.
The device is available in a 28-lead SSOP package. The
WM8775 is software compatible with the WM8776.
BLOCK DIAGRAM
FEATURES
Audio Performance
102dB SNR (‘A’ weighted @ 48kHz)
-90dB THD
ADC Sampling Frequency: 32kHz – 96kHz
Four stereo ADC inputs with analogue gain adjust from
+24dB to –21dB in 0.5dB steps
Digital gain adjust from -21.5dB to -103dB.
Programmable Automatic Level Control (ALC) or Limiter on
ADC input
3-Wire SPI Compatible or 2-wire Serial Control Interface
Master or Slave Clocking Mode
Programmable Audio Data Interface Modes
I2S, Left, Right Justified or DSP
16/20/24/32 bit Word Lengths
2.7V to 5.5V Analogue, 2.7V to 3.6V Digital supply Operation
APPLICATIONS
Surround Sound AV Processors and Hi-Fi systems
Automotive Audio
AINOPL
AINOPR
AINVGL
AINVGR
AIN1L
AIN1R
AIN2L
AIN2R
AIN3L
AIN3R
AIN4L
AIN4R
VMID
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WM8775
STEREO
ADC
AUDIO INTERFACE
ALC AND
DIGITAL FILTERS
MCLK
DOUT
ADCLRC
BCLK
CONTROL INTERFACE
WOLFSON MICROELECTRONICS plc
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Production Data, October 2008, Rev 4.4
Copyright ©2008 Wolfson Microelectronics plc






WM8775 Datasheet, Funktion
WM8775
Production Data
ELECTRICAL CHARACTERISTICS
Test Conditions
AVDD = 5V, DVDD = 3.3V, AGND = 0V, DGND = 0V, TA = +25oC, fs = 48kHz, MCLK = 256fs unless otherwise stated.
PARAMETER
SYMBOL TEST CONDITIONS
MIN
TYP
MAX
UNIT
Digital Logic Levels (TTL Levels)
Input LOW level
Input HIGH level
VIL
VIH
0.8 V
2.0 V
Output LOW
VOL IOL=1mA
0.1 x DVDD
V
Output HIGH
VOH
IOH=1mA
0.9 x DVDD
V
Analogue Reference Levels
Reference voltage
VVMID
AVDD/2
V
Potential divider resistance
ADC Performance
RVMID
50k
Input Signal Level (0dB)
1.0 x
Vrms
AVDD/5
SNR (Note 1,2)
A-weighted, 0dB gain
93
102
dB
@ fs = 48kHz
SNR (Note 1,2)
A-weighted, 0dB gain
99
dB
@ fs = 96kHz
64xOSR
Dynamic Range (note 2)
A-weighted, -60dB
full scale input
102
dB
Total Harmonic Distortion (THD)
1 kHz, 0dBFs
-92 dB
1kHz, -1dBFs
-95 -85 dB
ADC Channel Separation
1kHz Input
90 dB
Programmable Gain Step Size
0.25 0.5 0.75 dB
Programmable Gain Range
1kHz Input
-21
+24 dB
(Analogue)
Programmable Gain Range
1kHz Input
-82
+0 dB
(Digital)
Analogue Mute Attenuation
(Note 5)
1kHz Input, 0dB gain
76
dB
Power Supply Rejection Ratio
PSRR
1kHz 100mVpp
50
dB
20Hz to 20kHz
100mVpp
45
dB
Supply Current
Analogue supply current
AVDD = 5V
48 mA
Digital supply current
DVDD = 3.3V 4.5 mA
Notes:
1. Ratio of output level with 1kHz full scale input, to the output level with all zeros into the digital input, measured ‘A’
weighted.
2. All performance measurements done with 20kHz low pass filter, and where noted an A-weight filter. Failure to use
such a filter will result in higher THD+N and lower SNR and Dynamic Range readings than are found in the Electrical
Characteristics. The low pass filter removes out of band noise; although it is not audible it may affect dynamic
specification values.
3. VMID decoupled with 10uF and 0.1uF capacitors (smaller values may result in reduced performance).
4. All performance measurement done using certain timing conditions (please refer to section ‘Digital Audio Interface’).
5. A full digital MUTE can be achieved if the ADC gain (LAG/RAG) is set to minimum.
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PD, Rev 4.4, October 2008
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WM8775 pdf, datenblatt
WM8775
INTERNAL POWER ON RESET CIRCUIT
Production Data
Figure 8 Internal Power on Reset Circuit Schematic
The WM8775 includes an internal Power on Reset Circuit which is used reset the digital logic into a
default state after power up.
Figure 8 shows a schematic of the internal POR circuit. The POR circuit is powered from AVDD. The
circuit monitors DVDD and VMID and asserts PORB low if DVDD or VMID are below the minimum
threshold Vpor_off.
On power up, the POR circuit requires AVDD to be present to operate. PORB is asserted low until
AVDD and DVDD and VMID are established. When AVDD, DVDD, and VMID have been established,
PORB is released high, all registers are in their default state and writes to the digital interface may
take place.
On power down, PORB is asserted low whenever DVDD or VMID drop below the minimum threshold
Vpor_off.
If AVDD is removed at any time, the internal Power on Reset circuit is powered down and PORB will
follow AVDD.
In most applications the time required for the device to release PORB high will be determined by the
charge time of the VMID node.
Figure 9 Typical Power up Sequence where DVDD is Powered before AVDD
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PD, Rev 4.4, October 2008
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