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WM8521 Schematic ( PDF Datasheet ) - Wolfson Microelectronics plc

Teilenummer WM8521
Beschreibung STEREO DAC
Hersteller Wolfson Microelectronics plc
Logo Wolfson Microelectronics plc Logo 




Gesamt 21 Seiten
WM8521 Datasheet, Funktion
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WM8521
Stereo DAC with Integrated Output Stage
for 2Vrms LINE OUT
DESCRIPTION
FEATURES
The WM8521 is a 192kHz stereo DAC with an integrated output
op-amp stage, designed to generate a 2.0Vrms output signal
directly, so reducing external component requirements in digital
audio applications.
WM8521 comes into two variants WM8521HC and WM8521H9
which offers different line drive output capabilities. WM8521HC
outputs 2Vrms at 12V supply, while WM8521H9 outputs
2.0Vrms at 9V supply. WM8521HC/H9 are designed for cost
sensitive consumer digital audio applications requiring 2Vrms
line output.
A 24-bit multi-bit sigma delta DAC is used with oversampling
digital interpolation filters. Digital audio input word lengths from
16-32 bits and sampling rates from 8kHz to 192kHz are
supported.
The audio interface supports I2S, Right Justified and DSP digital
audio formats.
Audio Performance
- DAC SNR 98dB (‘A’ weighted @ 48kHz)
- THD -81dB (‘A’ weighted @ 48kHz)
DAC Sampling Frequency: 8kHz – 192kHz
Pin Selectable Audio Data Interface Format
- I2S, 16-bit Right Justified or 16bit DSP
2.0 Vrms output at 12V or 9V supply
7.6V to 13.2V Analogue, 2.7V to 3.6 Digital Supply
14-lead SOIC Package
APPLICATIONS
Consumer digital audio applications requiring 2 Vrms output
- DVD Players
- Digital TV
- Digital Set Top Boxes
- A/V Receivers
The devices are controlled via a hardware interface which
provides access to features including de-emphasis, mute and
data formats. These devices are pin equivalent and are
available in a 14-lead SOIC package.
BLOCK DIAGRAM
WOLFSON MICROELECTRONICS plc
Production Data, February 2013, Rev 4.2
Copyright 2013 Wolfson Microelectronics plc






WM8521 Datasheet, Funktion
WM8521
Production Data
DC ELECTRICAL CHARACTERISTICS
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
WM8521HC Analogue
supply range
AVDD
7.6 12
WM8521H9 Analogue
supply range
AVDD
7.6 9
Digital supply range
DVDD
2.7 3.3
Ground
AGND / DGND
0
WM8521HC Supply current
WM8521H9 Supply current
WM8521HC Power down
current (note 4)
WM8521H9 Power down
current (note 4)
IAVDD
IDVDD
IAVDD
IDVDD
IAVDD
IDVDD
IAVDD
IDVDD
AVDD = 12V
DVDD = 3.3V
AVDD = 9V
DVDD = 3.3V
AVDD = 12V
DVDD = 3.3V
AVDD = 9V
DVDD = 3.3V
28.0
4.0
25.0
4.0
22.8
0.014
17.1
0.014
Note:
1. AVDD and DVDD are fully independent and can be applied in any order without damage to the device.
MAX
13.2
13.2
3.6
UNIT
V
V
V
V
mA
mA
mA
mA
ELECTRICAL CHARACTERISTICS
Test Conditions
WM8521HC: AVDD = 12V, DVDD = 3.3V, AGND / DGND = 0V, TA = +25oC, fs = 48kHz, MCLK = 256fs unless otherwise stated.
WM8521H9: AVDD = 9V, DVDD = 3.3V, AGND / DGND = 0V, TA = +25oC, fs = 48kHz, MCLK = 256fs unless otherwise stated.
PARAMETER
SYMBOL TEST CONDITIONS
MIN
TYP
MAX
UNIT
Digital Logic Levels (CMOS Levels)
Input LOW level
VIL
0.3 x DVDD
V
Input HIGH level
VIH
0.7 x DVDD
V
Output LOW
Output HIGH
Analogue Reference Levels
VOL
VOH
IOL = 1mA
IOH = -1mA
0.9 x DVDD
0.1 x DVDD
V
V
Reference voltage (CAP)
AVDD/2
V
Potential divider resistance
RCAP
VDD to CAP and CAP
to GND
50
k
WM8521HC DAC Output (Load = 10k. 50pF)
0dBFs Full scale output voltage
SNR (Terminology Note 1,2,3)
At DAC outputs
A-weighted,
1.9
91
2.0 2.1
98
Vrms
dB
@ fs = 48kHz
SNR (Terminology Note 1,2,3)
A-weighted
98 dB
@ fs = 96kHz
SNR (Terminology Note 1,2,3)
Non ‘A’ weighted @ fs =
48kHz
95
dB
THD (Note 3)
1kHz, 0dBFs -81 dB
Dynamic Range (Note 2)
1kHz, THD+N @
91
98
dB
-60dBFs
DAC Channel Separation
1kHz, 0dBFs
93 dB
Power Supply Rejection Ratio
PSRR
1kHz 100mVpp
46
dB
WM8521H9 DAC Output (Load = 10k. 50pF)
0dBFs Full scale output voltage
SNR (Terminology Note 1,2,3)
At DAC outputs
A-weighted,
1.9
91
2.0 2.1
96
Vrms
dB
@ fs = 48kHz
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PD, Rev 4.2, February 2013
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WM8521 pdf, datenblatt
WM8521
Production Data
LRCLK
Max 4 BCLKs
1/fs
BCLK
DIN
LEFT CHANNEL
RIGHT CHANNEL
12
15 16 1 2
MSB
LSB
Input Word Length (16 bits)
15 16
Figure 5 DSP Timing Mode B
LRCLK
1 BCLK
Max 4 BCLKs
1/fs
NO VALID DATA
1
MSB
1 BCLK
BCLK
DIN
LEFT CHANNEL
RIGHT CHANNEL
12
MSB
15 16 1 2
LSB
Input Word Length (16 bits)
15 16
NO VALID DATA
Figure 6 DSP Timing Mode A
AUDIO DATA SAMPLING RATES
The master clock for WM8521 supports audio sampling rates from 256fs to 768fs, where fs is the
audio sampling frequency (LRCLK) typically 32kHz, 44.1kHz, 48kHz, 96kHz or 192kHz. The master
clock is used to operate the digital filters and the noise shaping circuits.
The WM8521 has a master clock detection circuit that automatically determines the relationship
between the master clock frequency and the sampling rate (to within +/- 32 master clocks). If there is
a greater than 32 clocks error, the master clock defaults to 768fs. The master clock should be
synchronised with LRCLK, although the WM8521 is tolerant of phase differences or jitter on this
clock.
SAMPLING
RATE
(LRCLK)
32kHz
44.1kHz
48kHz
96kHz
192kHz
128fs
4.096
5.6448
6.144
12.288
24.576
MASTER CLOCK FREQUENCY (MHz) (MCLK)
192fs
256fs
384fs
512fs
768fs
6.144
8.467
9.216
18.432
36.864
8.192
11.2896
12.288
24.576
Unavailable
12.288
16.9344
18.432
36.864
Unavailable
16.384
22.5792
24.576
Unavailable
Unavailable
24.576
33.8688
36.864
Unavailable
Unavailable
Table 1 Master Clock Frequencies Versus Sampling Rate
Note:
For sample rates down to 8k, scale MCLK accordingly.
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PD, Rev 4.2, February 2013
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