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PDF WM2619 Data sheet ( Hoja de datos )
| Número de pieza | WM2619 | |
| Descripción | 12-bit Parallel Input Voltage Output DAC | |
| Fabricantes | Wolfson Microelectronics plc | |
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WM2619
12-bit Parallel Input Voltage Output DAC
Production Data, June 1999, Rev 1.0
FEATURES
• 12-bit voltage output DAC
• Single supply 2.7V to 5.5V operation
• DNL ±0.4 LSB, INL ±1.5 LSB
• Settling time 1µs typical
• Low power consumption
- 8mW typical in slow mode - 5V supply
- 4.3mW typical in fast mode - 3V supply
• Power down mode
APPLICATIONS
• Battery powered test instruments
• Digital offset and gain adjustment
• Battery operated/remote industrial controls
• Machine and motion control devices
• Wireless telephone and communication systems
• Speech synthesis
• Arbitrary waveform generation
DESCRIPTION
The WM2619 is a 12-bit voltage output, resistor string, digital-to-
analogue converter. A hardware controlled power down mode is
provided that reduces power consumption to 50nW. In normal
operation the device dissipates 8mW at 5V or 4.3mW at 3V.
The device has been designed to interface efficiently to industry
standard microprocessors and DSPs.
Excellent performance is delivered with a typical DNL of 0.4 LSBs
and a settling time of 1µs. The output stage is buffered by a x2
gain near rail-to-rail amplifier, which features a Class A output
stage. The 12 data bits are double-buffered enabling the output to
be asynchronously updated under hardware control.
The device is available in a 20-pin TSSOP package. Commercial
temperature (0° to 70°C) and Industrial temperature (-40° to 85°C)
variants are supported.
ORDERING INFORMATION
DEVICE
WM2619CDT
WM2619IDT
TEMP. RANGE
0° to 70°C
-40° to 85°C
PACKAGE
20-pin TSSOP
20-pin TSSOP
BLOCK DIAGRAM
REFIN(12)
D[0-11]
(19,20, 1-10)
NWE (17)
NCS (18)
12-BIT
INPUT
REGISTER
data
REFERENCE
INPUT BUFFER
X1
12-BIT
DAC
LATCH
VDD
(11)
DAC
OUTPUT
BUFFER
X2
(13) OUT
POWER-ON
RESET
(14)
GND
(16)
NLDAC
POWERDOWN
CONTROL
(15)
NPD
WM2619
TYPICAL PERFORMANCE
1
VDD = 5V, VREF = 2.048V, Load = 10k/100pF
0.8
0.6
0.4
0.2
0
-0.2
-0.4
-0.6
-0.8
-1
0
512
1024
1536
2048
2559
DIGITAL CODE
3071
3583
4095
WOLFSON MICROELECTRONICS LTD
Lutton Court, Bernard Terrace, Edinburgh, EH8 9NX, UK
Tel: +44 (0) 131 667 9386
Fax: +44 (0) 131 667 5176
Email: [email protected]
http://www.wolfson.co.uk
Production Data Datasheets contain final
specifications current on publication date.
Supply of products conforms to Wolfson
Microelectronics’ Terms and conditions.
Masterrev1.0a.doc June 17, 1999 10:52
©1999 Wolfson Microelectronics Ltd.
1 page  
Production Data
WM2619
Test Conditions:
RL = 10kΩ, CL = 100pF. VDD = 5V ± 10%, VREF = 2.048V and VDD = 3V ± 10%, VREF = 1.024V over recommended operating free-air
temperature range (unless noted otherwise)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN TYP MAX UNIT
Digital Inputs
High level input current
IIH Input voltage = VDD
1 µA
Low level input current
IIL Input voltage = 0V
-1 µA
Input capacitance
CI
8 pF
Notes:
1. Integral non-linearity (INL) is the maximum deviation of the output from the line between zero and full scale (excluding the effects
of zero code and full scale errors).
2. Differential non-linearity (DNL) is the difference between the measured and ideal 1LSB amplitude change of any adjacent two
codes. A guarantee of monotonicity means the output voltage changes in the same direction (or remains constant) as a change in
digital input code.
3. Zero code error is the voltage output when the DAC input code is zero.
4. Gain error is the deviation from the ideal full scale output excluding the effects of zero code error.
5. Power supply rejection ratio is measured by varying VDD from 4.5V to 5.5V and measuring the proportion of this signal imposed on
the zero code error and the gain error.
6. Zero code error and Gain error temperature coefficients are normalised to full scale voltage.
7. Output load regulation is the difference between the output voltage at full scale with a 10kΩ load and 2kΩ load. It is expressed as
a percentage of the full scale output voltage with a 10kΩ load.
8. IDD is measured while continuously writing code 2048 to the DAC. For VIH < VDD - 0.7V and VIL > 0.7V supply current will increase.
9. Typical supply current in power down mode is 10nA. Production test limits are wider for speed of test.
10. Slew rate results are for the lower value of the rising and falling edge slew rates.
11. Settling time is the time taken for the signal to settle to within 0.5LSB of the final measured value for both rising and falling edges.
Limits are ensured by design and characterisation, but are not production tested.
12. SNR, SNRD, THD and SPFDR are measured on a synthesised sinewave at frequency fOUT generated with a sampling frequency fs.
WOLFSON MICROELECTRONICS LTD
Production Data Rev1.0 June 1999
5
5 Page | ||
| Páginas | Total 9 Páginas | |
| PDF Descargar | [ Datasheet WM2619.PDF ] | |
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