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PDF W83194BR-KT Data sheet ( Hoja de datos )
| Número de pieza | W83194BR-KT | |
| Descripción | STEP-LESS 3-DIMM K7 CLOCK | |
| Fabricantes | Winbond | |
| Logotipo |  |
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W83194BR-KT
STEP-LESS 3-DIMM K7 CLOCK
1.0 GENERAL DESCRIPTION
The W83194BR-KT is a Clock Synthesizer which provides all clocks required for AMD K7.
W83194BR-KT provides 64 CPU/PCI frequencies which are selectable with smooth transitions by
hardware or software. W83194BR-KT also provides 13 SDRAM clocks controlled by the none-delay
buffer_in pin.
The W83194BR-KT provides step-less frequency programming by controlling the VCO freq. and the
programmable PCI clock output divisor ratio. A watchdog timer is quipped and when time out, the
RESET# pin will output 4ms pulse signal.
The W83194BR-KT accepts a 14.318 MHz reference crystal as its input. Spread spectrum built in at
±0.5% or ±0.25% to reduce EMI. Programmable stopping individual clock outputs and frequency
selection through I2C interface. The device meets the Pentium power-up stabilization, which requires
CPU and PCI clocks be stable within 2 ms after power-up. Using dual function pin for the slots (ISA,
PCI, CPU, DIMM) is not recommend.
2.0 PRODUCT FEATURES
• Supports AMD CPU with I2C.
• 3 CPU clocks (one free-running chipset clock controlled by I2C)
• 13 SDRAM clocks for 3 DIMMs
• 6 PCI synchronous clocks
• Optional single or mixed supply:
(Vddq2 =2.5V, Vddq3 =3.3V)
• < 250ps skew among CPU and SDRAM clocks
• < 250ps skew among PCI clocks
• < 5ns propagation delay SDRAM from buffer input
• Skew from CPU (earlier) to PCI clock 1 to 4ns, center 2.6ns.
• Smooth frequency switch with selections from 66 MHz to 200 MHz CPU
• Step-less frequency programming by controlling the VCO freq. and the clock output divisor ratio
• I2C 2-Wire serial interface and I2C read back
• ±0.25% or ±0.5% spread spectrum function to reduce EMI
• Programmable spread spectrum in the M/N step-less mode
• Programmable registers to enable/stop each output and select modes
• MODE pin for power Management and RESET# out when Watch Dog Timer time out
• One 48 MHz for USB & one 24 MHz for super I/O
• 48-pin SSOP package
Publication Release Date: June 2000
- 1 - Revision 0.43
1 page  
W83194BR-KT
PRELIMINARY
Vss 3,9,16,22,33,39,45, Circuit Ground.
47
Publication Release Date: June 2000
- 5 - Revision 0.43
5 Page 
W83194BR-KT
7.2.13 Register 12: Winbond Chip ID Register (Read Only)
Bit @PowerUp Pin
7 0 - Winbond Chip ID
6 1 - Winbond Chip ID
5 1 - Winbond Chip ID
Description
4 0 - Winbond Chip ID
3 0 - Winbond Version ID
2 0 - Winbond Version ID
1 0 - Winbond Version ID
0 1 - Winbond Version ID
PRELIMINARY
- 11 -
Publication Release Date: June 2000
Revision 0.43
11 Page | ||
| Páginas | Total 13 Páginas | |
| PDF Descargar | [ Datasheet W83194BR-KT.PDF ] | |
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