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W78LE54-24 Schematic ( PDF Datasheet ) - Winbond

Teilenummer W78LE54-24
Beschreibung 8-BIT MTP MICROCONTROLLER
Hersteller Winbond
Logo Winbond Logo 




Gesamt 22 Seiten
W78LE54-24 Datasheet, Funktion
Preliminary W78LE54
8-BIT MTP MICROCONTROLLER
GENERAL DESCRIPTION
The W78LE54 is an 8-bit microcontroller which can accommodate a wide supply voltage range with
low power consumption. The instruction set for the W78LE54 is fully compatible with the standard
8051. The W78LE54 contains an 16K bytes MTP ROM (Multiple-Time Programmable ROM); a 256
bytes RAM; four 8-bit bi-directional and bit-addressable I/O ports; an additional 4-bit I/O port P4; three
16-bit timer/counters; a hardware watchdog timer and a serial port. These peripherals are supported
by eight sources two-level interrupt capability. To facilitate programming and verification, the MTP-
ROM inside the W78LE54 allows the program memory to be programmed and read electronically.
Once the code is confirmed, the user can protect the code for security.
The W78LE54 microcontroller has two power reduction modes, idle mode and power-down mode,
both of which are software selectable. The idle mode turns off the processor clock but allows for
continued peripheral operation. The power-down mode stops the crystal oscillator for minimum power
consumption. The external clock can be stopped at any time and in any state without affecting the
processor.
FEATURES
Fully static design 8-bit CMOS microcontroller
Wide supply voltage of 2.4V to 5.5V
256 bytes of on-chip scratchpad RAM
16 KB electrically erasable/programmable MTP-ROM
64 KB program memory address space
64 KB data memory address space
Four 8-bit bi-directional ports
One extra 4-bit bit-addressable I/O port, additional INT2 / INT3
(available on 44-pin PLCC/QFP package)
Three 16-bit timer/counters
One full duplex serial port(UART)
Watchdog Timer
Eight sources, two-level interrupt capability
EMI reduction mode
Built-in power management
Code protection mechanism
Packages:
DIP 40: W78LE54-24
PLCC 44: W78LE54P-24
PQFP 44: W78LE54F-24
Publication Release Date: February 1999
- 1 - Revision A1






W78LE54-24 Datasheet, Funktion
Preliminary W78LE54
alternative function pins. It can be used as general I/O pins or external interrupt input sources (INT2 ,
INT3 ).
Example:
P4
REG 0D8H
MOV
MOV
SETB
CLR
P4, #0AH
A, P4
P4.0
P4.1
; Output data "A" through P4.0P4.3.
; Read P4 status to Accumulator.
; Set bit P4.0
; Clear bit P4.1
3. Reduce EMI Emission
Because of on-chip MTP-ROM, when a program is running in internal ROM space, the ALE will be
unused. The transition of ALE will cause noise, so it can be turned off to reduce the EMI emission if it
is useless. Turning off the ALE signal transition only requires setting the bit 0 of the AUXR SFR,
which is located at 08Eh. When ALE is turned off, it will be reactivated when the program accesses
external ROM/RAM data or jumps to execute an external ROM code. The ALE signal will turn off
again after it has been completely accessed or the program returns to internal ROM code space. The
AO bit in the AUXR register, when set, disables the ALE output. In order to reduce EMI emission from
oscillation circuitry, W78LE54 allows user to diminish the gain of on-chip oscillator amplifiers by using
programmer to clear the B7 bit of security register. Once B7 is set to 0, a half of gain will be
decreased. Care must be taken if user attempts to diminish the gain of oscillator amplifier, reducing a
half of gain may affect the external crystal operating improperly at high frequency above 24MHz. The
value of R and C1,C2 may need some adjustment while running at lower gain.
***AUXR - Auxiliary register (8EH)
- - - - - - - AO
AO: Turn off ALE output.
4. Power-off Flag
***PCON - Power control (87H)
-
-
-
POF GF1 GF0
PD
IDL
POF:
Power off flag. Bit is set by hardware when power on reset. It can be cleared by software
to determine chip reset is a warm boot or cold boot.
GF1, GF0: These two bits are general-purpose flag bits for the user.
PD: Power down mode bit. Set it to enter power down mode.
IDL: Idle mode bit. Set it to enter idle mode.
The power-off flag is located at PCON.4. This bit is set when VDD has been applied to the part. It can
be used to determine if a reset is a warm boot or a cold boot if it is subsequently reset by software.
-6-

6 Page









W78LE54-24 pdf, datenblatt
Preliminary W78LE54
ABSOLUTE MAXIMUM RATINGS
PARAMETER
DC Power Supply
Input Voltage
Operating Temperature
Storage Temperature
SYMBOL
VDDVSS
VIN
TA
TST
MIN.
-0.3
VSS -0.3
0
-55
MAX.
+7.0
VDD +0.3
70
+150
UNIT
V
V
°C
°C
Note: Exposure to conditions beyond those listed under Absolute Maximum Ratings may adversely affect the life and reliability of the
device.
DC CHARACTERISTICS
VSS = 0V, TA = 25° C, unless otherwise specified.
PARAMETER
SYM. SPECIFICATION
MIN. MAX.
Operating Voltage
VDD 2.4
5.5
Operating Current
IDD -
-
20
3
Idle Current
IIDLE
-
6
- 1.5
Power Down Current
IPWDN
-
50
- 20
Input Current
P1, P2, P3, P4
IIN1 -50
+10
Input Current
RST
IIN2 -10 +300
Input Leakage Current
ILK -10 +10
P0, EA
Logic 1 to 0 Transition
Current
P1, P2, P3, P4
ITL [*4] -500
-
Input Low Voltage
VIL1
0
0.8
P0, P1, P2, P3, P4, EA
0 0.5
Input Low Voltage
RST[*1]
VIL2
0
0
0.8
0.3
UNIT
V
mA
mA
mA
mA
µA
µA
µA
µA
µA
µA
V
V
V
V
TEST CONDITIONS
No load VDD = 5.5V
No load VDD = 2.4V
VDD = 5.5V, Fosc =20 MHz
VDD = 2.4V, Fosc =12 MHz
VDD = 5.5V, Fosc =20 MHz
VDD = 2.4V, Fosc =12 MHz
VDD = 5.5V
VIN = 0V or VDD
VDD = 5.5V
0 < VIN < VDD
VDD = 5.5V
0V < VIN < VDD
VDD = 5.5V
VIN = 2.0V
VDD = 4.5V
VDD = 2.4V
VDD = 4.5V
VDD = 2.4V
- 12 -

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