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PDF W27E512 Data sheet ( Hoja de datos )
| Número de pieza | W27E512 | |
| Descripción | 64K X 8 ELECTRICALLY ERASABLE EPROM | |
| Fabricantes | Winbond | |
| Logotipo |  |
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W27E512
64K × 8 ELECTRICALLY ERASABLE EPROM
GENERAL DESCRIPTION
The W27E512 is a high speed, low power Electrically Erasable and Programmable Read Only
Memory organized as 65536 × 8 bits that operates on a single 5 volt power supply. The W27E512
provides an electrical chip erase function.
FEATURES
• High speed access time:
45/55/70/90/120/150 nS (max.)
• Read operating current: 30 mA (max.)
• Erase/Programming operating current
30 mA (max.)
• Standby current: 1 mA (max.)
• Single 5V power supply
• +14V erase/+12V programming voltage
• Fully static operation
• All inputs and outputs directly TTL/CMOS
compatible
• Three-state outputs
• Available packages: 28-pin 600 mil DIP, 330 mil
SOP, TSOP and 32-pin PLCC
PIN CONFIGURATIONS
BLOCK DIAGRAM
A15
A12
A7
A6
A5
A4
A3
A2
A1
A0
Q0
Q1
Q2
GND
1 28
2 27
3 26
4 25
5 24
6 28-pin 23
7 DIP 22
8 21
9 20
10 19
11 18
12 17
13 16
14 15
VCC
A14
A13
A8
A9
A11
OE/Vpp
A10
CE
Q7
Q6
Q5
Q4
Q3
AA VAA
A1 1NC1 1
7 2 5CC4 3
432 1 3 3 3
A6 5
2 1 0 29 A8
A5 6
28 A9
A4 7
A3 8
A2 9
32-pin
PLCC
27 A11
26 NC
25 OE/Vpp
A1 10
A0 11
24 A10
23 CE
NC
Q0
12 1
13 4
1
5
1
6
11
78
1
9
2 22
0 21
Q7
Q6
OE/Vpp
A11
A9
A8
A13
A14
VCC
A15
A12
A7
A6
A5
A4
A3
Q QGN QQQ
1 2NC 3 4 5
D
1 28
2 27
3 26
4 25
5 24
6 23
7
28-pin
22
8
TSOP
21
9 20
10 19
11 18
12 17
13 16
14 15
A10
CE
Q7
Q6
Q5
Q4
Q3
GND
Q2
Q1
Q0
A0
A1
A2
CE
OE/VPP
CONTROL
OUTPUT
BUFFER
Q0
.
.
Q7
A0
.
DECODER
.
A15
VCC
GND
CORE
ARRAY
PIN DESCRIPTION
SYMBOL
A0−A15
Q0−Q7
CE
OE /VPP
VCC
GND
NC
DESCRIPTION
Address Inputs
Data Inputs/Outputs
Chip Enable
Output Enable, Program/Erase
Supply Voltage
Power Supply
Ground
No Connection
Publication Release Date: June 2000
- 1 - Revision A9
1 page  
W27E512
CAPACITANCE
(VCC = 5V, TA = 25° C, f = 1 MHz)
PARAMETER
Input Capacitance
Output Capacitance
SYMBOL
CIN
COUT
AC CHARACTERISTICS
AC Test Conditions
PARAMETER
Input Pulse Levels
Input Rise and Fall Times
Input and Output Timing Reference Level
Output Load
AC Test Load and Waveforms
CONDITIONS
VIN = 0V
VOUT = 0V
MAX.
6
12
UNIT
pF
pF
CONDITIONS
0 to 3.0V
5 nS
1.5V/1.5V
CL = 30 pF,
IOH/IOL = -0.4 mA/2.1 mA
+1.3V
(IN914)
3.3K ohm
DOUT
100 pF for 90/120/150 nS (Including Jig and Scope)
30 pF for 45/55/70 nS (Including Jig and Scope)
Input
3.0V
0V
Test Point
1.5V
Output
Test Point
1.5V
Publication Release Date: June 2000
- 5 - Revision A9
5 Page 
W27E512
SMART PROGRAMMING ALGORITHM 2
Increment
Address
Start
Address = First Location
Vcc = 5.0V
X=0
Program One 100 µS Pulse
OE/VPP = 12V
Fail
No
Increment X
X = 25?
No
Yes
Verify One Byte
OE/VPP = VIL
Pass
Verify One Byte
OE/VPP = VIL
Pass
Fail
Last Address
?
Yes
Compare
All Bytes to
Original
Data
Pass
Device
Passed
Fail
Device
Failed
- 11 -
Publication Release Date: June 2000
Revision A9
11 Page | ||
| Páginas | Total 16 Páginas | |
| PDF Descargar | [ Datasheet W27E512.PDF ] | |
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