PDF W155 Data sheet ( Hoja de datos )

Número de pieza	W155
Descripción	Spread Spectrum Frequency Timing Generator
Fabricantes	Cypress Semiconductor
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No Preview Available ! W155 Spread Spectrum Frequency Timing Generator Features • Generates a spread spectrum timing signal (SYSCLK) and a non-spread signal (USBCLK) • Requires a 14.318-MHz crystal for operation • Supports MIPS microprocessor clock frequencies • Reduces peak EMI by as much as 12 dB • Integrated loop filter components • Cycle-to-cycle jitter = 250 ps (max) • Operates with a 3.3 or 5.0V power supply • Spread output is selectable from 10 to 133 MHz • TEST mode supports modulation off (High-Z) and spe- cial test input reference frequency • Guaranteed 45/55 duty cycle • Packaged in a 16-pin, 300-mil-wide SOIC (Small Outline Integrated Circuit) Overview The W155 incorporates the latest advances in PLL-based spread spectrum frequency synthesizer technology. By fre- quency modulating the SYSCLK output with a low-frequency carrier, peak EMI can be greatly reduced in a system. Use of this technique allows systems to pass increasingly difficult EMI testing without resorting to costly shielding or redesign. In a system that uses the W155, not only is EMI reduced in the various clock lines, but also in all signals which are synchro- nized to SYSCLK. Therefore, the benefits of using this tech- nique increase with the number of address and data lines in the system. The W155 is specifically targeted toward MIPS microproces- sor based systems where EMI is of particular concern. Each device uses a single 14.318-MHz crystal to generate a select- able spread spectrum output and an unmodulated 48-MHz USB Output. The spreading function can be disabled by taking the SSON# pin high. Spread percentage can be selected with the SS% input (see Table 2 below). Table 1. Frequency Selection (14.318-MHz Reference) SYSCLK FS3 FS2 FS1 FS0 (Output Freq.) 0 0 0 0 133.3 MHz 0001 120 MHz 0010 100 MHz 0 0 1 1 74.77 MHz 0100 70 MHz 0101 66.6 MHz 0110 60 MHz 0111 50 MHz 1000 40 MHz 1 0 0 1 33.33 MHz 1010 30 MHz 1011 25 MHz 1100 20 MHz 1 1 0 1 16.67 MHz 1110 12 MHz 1111 10 MHz Table 2. Spread Percentage Selection SS% 0 1 Spread Percentage –1.25% –3.75% [1] Pin Configuration VDD X1 X2 GND FS3* VDD FS2* FS1* 1 2 3 4 5 6 7 8 16 TEST 15 VDD 14 USBCLK/SS%* 13 GND 12 SYSCLK 11 GND 10 FS0* 9 SSON#^ Note: 1. Internal pull-up resistor present on inputs marked with ‘’ and pull-down resistor present on input marked with ‘^’. Cypress Semiconductor Corporation • 3901 North First Street • San Jose • CA 95134 • 408-943-2600 September 29, 1999, rev. * 1 page W155 Absolute Maximum Ratings Stresses greater than those listed in this table may cause per- manent damage to the device. These represent a stress rating only. Operation of the device at these or any other conditions . Parameter Description VDD, VIN TSTG TA TB Voltage on any pin with respect to GND Storage Temperature Operating Temperature Ambient Temperature under Bias above those specified in the operating sections of this specifi- cation is not implied. Maximum conditions for extended peri- ods may affect reliability Rating –0.5 to +7.0 –65 to +150 0 to +70 –55 to +125 Unit V °C °C °C DC Electrical Characteristics: 0°C < TA < 70°C, VDD = 3.30V±10% Parameter IDD VIL VIH VOL VOH IOL IOH IIL IIH CI CL Description Supply Current Input Low Voltage Input High Voltage Output Low Voltage Output High Voltage Output Low Current Output High Current Input Low Current Input High Current Input Capacitance XTAL Load Capacitance Test Condition IOL = 2 mA IOH = –2 mA VOL = 1.5V VOH = 1.5V Min Typ Max Unit 35 mA 0.8 V 2.0 V 50 mV 3.10 V 80 110 155 mA 80 120 175 mA 10 µA 10 µA 5 10 pF 20 pF Switching Characteristics Parameter Description Test Conditions Min Typ Max Unit tTLH, tTHL tTLH, tTHL Output Rise and Fall Time measured at 10% of 90% of VDD Output Rise and Fall Time measured at 0.8V–2.0V 0.8 4.0 ns 0.3 1.0 ns tSYM tJCC EMI Output Duty Cycle Cycle-to-Cycle Jitter EMI Attenuation 11th Harmonic, 25 MHz 45 10 55 % 250 ps dB Ordering Information Ordering Code Package Name W155 G Package Type 16-pin Plastic SOIC (300-mil, wide body) Document #: 38-00785 5 5 Page

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