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PCF84C85AT Schematic ( PDF Datasheet ) - NXP Semiconductors

Teilenummer PCF84C85AT
Beschreibung Microcontroller with extended I/O
Hersteller NXP Semiconductors
Logo NXP Semiconductors Logo 




Gesamt 20 Seiten
PCF84C85AT Datasheet, Funktion
INTEGRATED CIRCUITS
DATA SHEET
PCF84C85A
Microcontroller with extended I/O
Product specification
Supersedes data of May 1994
File under Integrated Circuits, IC14
1996 Nov 21






PCF84C85AT Datasheet, Funktion
Philips Semiconductors
Microcontroller with extended I/O
Product specification
PCF84C85A
8 SUMMARY OF DERIVATIVE PORTS AND REGISTERS
Table 2 Derivative Ports.
DERIVATIVE
ADDRESS
00H
01H
02H
03H
04H
TYPE
R
R
R/W
R/W
REGISTER
MNEMONIC
DP0L
DP1L
DP0FF
DP1FF
DESCRIPTION
Derivative Port 0 lines
Derivative Port 1 lines
Derivative Port 0 flip-flops
Derivative Port 1 flip-flops
Table 3 Derivative Registers.
REGISTER
MNEMONIC
DP0L
DP1L
DP0FF
DP1FF
7
D0.7
0
F0.7
0
6
D0.6
D1.6
F0.6
F1.6
5
D0.5
D1.5
F0.5
F1.5
4
D0.4
D1.4
F0.4
F1.4
3
D0.3
D1.3
F0.3
F1.3
2
D0.2
D1.2
F0.2
F1.2
1
D0.1
D1.1
F0.1
F1.1
0
D0.0
D1.0
F0.0
F1.0
9 ROM MASK OPTIONS
Program/data
ROM CODE
Port Output
P0.0 to P0.7
P1.0 to P1.7
SDA/P2.3
DP0.0 to DP0.7
DP1.0 to DP1.7
Port State after reset
P0.0 to P0.7
P1.0 to P1.7
SDA/P2.3
DP1.0 to DP1.7
DP2.0 to DP2.2
Oscillator
Transconductance
OPTION
Any mix of instructions and data up to ROM size of
8 kbytes.
standard
standard
standard
standard
open-drain
open-drain
open-drain
open-drain
open-drain
push-pull
push-pull
push-pull
push-pull
set
reset
set
reset
set
set
reset
set
reset
LOW (gmL)
MEDIUM (gmM) HIGH (gmH)
1996 Nov 21
6

6 Page









PCF84C85AT pdf, datenblatt
Philips Semiconductors
Microcontroller with extended I/O
Product specification
PCF84C85A
13 AC CHARACTERISTICS
VDD = 2.5 to 5.5 V; VSS = 0 V; Tamb = 40 to +85 °C; all voltages with respect to VSS; unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN. TYP. MAX. UNIT
tr
rise time all outputs
VDD = 5 V; Tamb = 25 °C; CL = 50 pF
30
ns
tf
fall time all outputs
VDD = 5 V; Tamb = 25 °C; CL = 50 pF
30
ns
fxtal clock frequency
see Fig.3
1 16 MHz
Table 4 I2C-bus timing (see Figs 14 and 15)
SYMBOL
PARAMETER
INPUT
(see Fig.14)
OUTPUT
(see Fig.15; note 1)
SCLK
tHD;STA
tLOW
tHIGH
tRC
tFC
SDA
tBUF
tSU;DAT
tHD;DAT
tRD
tFD
tSU;STO
START condition hold time
SCLK LOW time
SCLK HIGH time
SCLK rise time
SCLK fall time
bus free time
data set-up time
data hold time
SDA/P2.3 rise time
SDA/P2.3 fall time
STOP condition set-up time
f--1x---t4-a--l
-f-1x---t7-a--l
-f-1x---t7-a--l
1 µs
0.3 µs
-f-1x---t4-a--l
250 ns
0
1 µs
0.3 µs
-f-1x---t4-a--l
2-D----×F-----f-+-x--t-9a--l
2-D----×-F----f--x--t-3a--l ; note 2
2-D----×F-----f-+-x--t-3a--l ; note 2
1 µs; note 3
0.1 µs; note 4
4.7 µs; note 5
f--1x---t5-a--l ; note 6
-f-x-9--t-a--l
1 µs; note 3
0.1 µs; note 4
2-D----×-F----f--x--t-3a--l
Notes
1. DF stands for Division Factor: the divisor of fxtal (see “PCF84CXXXA family” data sheet).
2. Values given for ASC = 0; for ASC = 1: tHIGH = -3----(-4--D--×---F--f--x-+-t--a--1l---)-- ; tLOW = 4-D----×-F----f--x--t-3a--l
3. Determined by I2C-bus capacitance (Cb) and external pull-up resistor.
4. At maximum allowed I2C-bus capacitance Cb = 400 pF.
5. Determined by program.
6. If tLOW < f--2x---t4-a--l , tSU:DAT t--L---O--f-W-x--t-a---l---9-- , independent of ASC.
1996 Nov 21
12

12 Page





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