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PCA9538D Schematic ( PDF Datasheet ) - NXP Semiconductors

Teilenummer PCA9538D
Beschreibung 8-bit I2C and SMBus low power I/O port with interrupt and reset
Hersteller NXP Semiconductors
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Gesamt 18 Seiten
PCA9538D Datasheet, Funktion
INTEGRATED CIRCUITS
PCA9538
8-bit I2C and SMBus low power I/O port
with interrupt and reset
Product data sheet
Supersedes data of 2004 Sep 30
2004 Oct 05
Philips
Semiconductors






PCA9538D Datasheet, Funktion
Philips Semiconductors
8-bit I2C and SMBus low power I/O port
with interrupt and reset
Product data sheet
PCA9538
Device address
SLAVE ADDRESS
1 1 1 0 0 A1 A0 R/W
FIXED
HARDWARE SELECTABLE
SW02175
Figure 5. PCA9538 address
Bus transactions
Data is transmitted to the PCA9538 registers using the write mode as shown in Figures 6 and 7. Data is read from the PCA9538 registers using
the read mode as shown in Figures 8 and 9. These devices do not implement an auto-increment function so once a command byte has been
sent, the register which was addressed will continue to be accessed by reads until a new command byte has been sent.
SCL
1 2345 6 78 9
slave address
command byte
data to port
SDA S 1 1 1 0 0 A1 A0 0 A 0 0 0 0 0 0 0 1 A
start condition
R/W acknowledge
from slave
acknowledge
from slave
WRITE TO
PORT
DATA 1
DATA OUT
FROM PORT
Figure 6. WRITE to output port register
AP
acknowledge
from slave
DATA 1 VALID
tpv
SW02176
SCL
1 2345 6 78 9
slave address
command byte
data to register
SDA S 1 1 1 0 0 A1 A0 0 A 0 0 0 0 0 0 1 1/0 A
start condition
DATA TO
REGISTER
R/W acknowledge
from slave
acknowledge
from slave
DATA
Figure 7. WRITE to configuration or polarity inversion registers
AP
acknowledge
from slave
SW02177
2004 Oct 05
6

6 Page









PCA9538D pdf, datenblatt
Philips Semiconductors
8-bit I2C and SMBus low power I/O port
with interrupt and reset
Product data sheet
PCA9538
SCL
START
ACK OR READ CYCLE
SDA
30%
RESET
50%
tREC
I/Ox
50%
tRESET
50%
tW
Figure 14. Definition of RESET timing
tRESET
50%
I/O configured as inputs
SW02340
70 %
SCL
2
1
0
A
P
30 %
SDA
tPS tPH
INPUT
tIV
50 %
tIR
INT
SW02329
Figure 15. Expanded view of Read input port register
70 %
SCL
2
1
0
A
P
30 %
2004 Oct 05
SDA
tPV
OUTPUT
50 %
SW02330
Figure 16. Expanded view of Write to output port register
12

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