Datenblatt-pdf.com


PCA9534PW Schematic ( PDF Datasheet ) - NXP Semiconductors

Teilenummer PCA9534PW
Beschreibung 8-bit I2C and SMBus/ low power I/O port with interrupt
Hersteller NXP Semiconductors
Logo NXP Semiconductors Logo 




Gesamt 17 Seiten
PCA9534PW Datasheet, Funktion
INTEGRATED CIRCUITS
PCA9534
8-bit I2C and SMBus, low power I/O port
with interrupt
Product data sheet
Supersedes data of 2003 Dec 02
2004 Sep 30
Philips
Semiconductors






PCA9534PW Datasheet, Funktion
Philips Semiconductors
8-bit I2C and SMBus low power I/O port with interrupt
Product data sheet
PCA9534
Device address
SLAVE ADDRESS
0 1 0 0 A2 A1 A0 R/W
FIXED
HARDWARE SELECTABLE
su01685
Figure 5. PCA9534 address
Bus transactions
Data is transmitted to the PCA9534 registers using the write mode as shown in Figures 6 and 7. Data is read from the PCA9534 registers using
the read mode as shown in Figures 8 and 9. These devices do not implement an auto-increment function so once a command byte has been
sent, the register which was addressed will continue to be accessed by reads until a new command byte has been sent.
SCL
1 2345 6 78 9
slave address
command byte
data to port
SDA S 0 1 0 0 A2 A1 A0 0 A 0 0 0 0 0 0 0 1 A
start condition
R/W acknowledge
from slave
acknowledge
from slave
WRITE TO
PORT
DATA 1
AP
acknowledge
from slave
DATA OUT
FROM PORT
Figure 6. WRITE to output port register
DATA 1 VALID
tpv
su01421
SCL
1 2345 6 78 9
slave address
command byte
data to register
SDA S 0 1 0 0 A2 A1 A0 0 A 0 0 0 0 0 0 1 1/0 A
start condition
DATA TO
REGISTER
R/W acknowledge
from slave
acknowledge
from slave
DATA
Figure 7. WRITE to configuration or polarity inversion registers
AP
acknowledge
from slave
su01422
2004 Sep 30
6

6 Page









PCA9534PW pdf, datenblatt
Philips Semiconductors
8-bit I2C and SMBus low power I/O port with interrupt
Product data sheet
PCA9534
PROTOCOL
START
CONDITION
(S)
BIT 7
MSB
(A7)
tSU;STA
t LOW
t HIGH
BIT 6
(A6)
1 / f SCL
SCL
t BUF
tr
tf
SDA
BIT 8
(R/W)
ACKNOWLEDGE
(A)
STOP
CONDITION
(S)
t HD;STA
t SU;DAT
t HD;DAT
t VD;DAT
t VD;ACK
Figure 14. I2C-bus timing diagram; rise and fall times refer to VIL and VIH
t SU;STO
SW02287
PULSE
GENERATOR
VI
RT
VCC
D.U.T.
RL = 500
VO
CL
50 pF
6.0 V
Open
DEFINITIONS
RL = Load resistor.
CL = Load capacitance includes jig and probe capacitance
RT = Termination resistance should be equal to the output
impedance ZO of the pulse generators.
Figure 15. Test circuitry for switching times
SW02142
From Output
Under Test
CL = 50 pF
500
500
2VDD
S1
Open
GND
Load Circuit
TEST
tpv
S1
2 VDD
SA00652
Figure 16. Test circuit
2004 Sep 30
12

12 Page





SeitenGesamt 17 Seiten
PDF Download[ PCA9534PW Schematic.PDF ]

Link teilen




Besondere Datenblatt

TeilenummerBeschreibungHersteller
PCA9534PW8-bit I2C and SMBus/ low power I/O port with interruptNXP Semiconductors
NXP Semiconductors

TeilenummerBeschreibungHersteller
CD40175BC

Hex D-Type Flip-Flop / Quad D-Type Flip-Flop.

Fairchild Semiconductor
Fairchild Semiconductor
KTD1146

EPITAXIAL PLANAR NPN TRANSISTOR.

KEC
KEC


www.Datenblatt-PDF.com       |      2020       |      Kontakt     |      Suche