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PCA9500BS Schematic ( PDF Datasheet ) - NXP Semiconductors

Teilenummer PCA9500BS
Beschreibung 8-bit I2C and SMBus I/O port with 2-kbit EEPROM
Hersteller NXP Semiconductors
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Gesamt 21 Seiten
PCA9500BS Datasheet, Funktion
INTEGRATED CIRCUITS
PCA9500
8-bit I2C and SMBus I/O port with
2-kbit EEPROM
Product data
Supersedes data of 27 Sep 2002
2003 Jun 27
Philips
Semiconductors






PCA9500BS Datasheet, Funktion
Philips Semiconductors
8-bit I2C and SMBus I/O port with 2-kbit EEPROM
Product data
PCA9500
These devices turn on when an output is written HIGH, and are switched off by the negative edge of SCL. The I/Os should be HIGH before
being used as inputs.
SLAVE ADDRESS (I/O EXPANDER)
DATA TO PORT
SDA S 0 1 0 0 A2 A1 A0 0 A
1
START CONDITION
R/W ACKNOWLEDGE
FROM SLAVE
I/O3
SCL
12 345 678
DATA TO PORT
A0
ACKNOWLEDGE
FROM SLAVE
I/O3
AP
I/O3
OUTPUT
VOLTAGE
I/O3
PULL-UP
OUTPUT
CURRENT
IOHt
IOH
Figure 8. Transient pull-up current IOHt while I/O3 changes from LOW-to-HIGH and back to LOW
SW00905
2003 Jun 27
6

6 Page









PCA9500BS pdf, datenblatt
Philips Semiconductors
8-bit I2C and SMBus I/O port with 2-kbit EEPROM
Product data
PCA9500
TYPICAL APPLICATION
VDD
VDD
1.6 k
SCL
MASTER
CONTROLLER
SDA
GND
1.6 k
2 k
(optional)
VDD
SCL
SDA
I/00
I/01
PCA9500
I/02
I/03
I/04
I/05
A2
I/06
A1
I/07
A0
VSS
NOTE: GPIO device address configured as 0100100 for this example
EEPROM device address configured as 1010100 for this example
I/00, I/02, I/03, configured as outputs
I/01, I/04, I/05, configured as inputs
I/006, I/07, are not used and have to be configured as outputs
Figure 19. Typical application
2 k
SUBSYSTEM 1
(e.g. temp sensor)
INT
RESET
SUBSYSTEM 2
(e.g. counter)
A
ENABLE
Controlled Switch
(e.g. CBT device)
B
ALARM
SUBSYSTEM 3
(e.g. alarm
system)
VDD
SW01076
2003 Jun 27
12

12 Page





SeitenGesamt 21 Seiten
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