|
|
Teilenummer | PCA8581T |
|
Beschreibung | 128 x 8-bit EEPROM with I2C-bus interface | |
Hersteller | NXP Semiconductors | |
Logo | ||
Gesamt 20 Seiten INTEGRATED CIRCUITS
DATA SHEET
PCA8581; PCA8581C
128 × 8-bit EEPROM with I2C-bus
interface
Product specification
Supersedes data of 1996 Aug 19
File under Integrated Circuits, IC12
1997 Apr 02
Philips Semiconductors
128 × 8-bit EEPROM with I2C-bus interface
Product specification
PCA8581; PCA8581C
7.3 System configuration
A device generating a message is a ‘transmitter’, a device receiving a message is the ‘receiver’. The device that controls
the message is the ‘master’ and the devices which are controlled by the master are the ‘slaves’.
SDA
SCL
MASTER
TRANSMITTER /
RECEIVER
SLAVE
RECEIVER
SLAVE
TRANSMITTER /
RECEIVER
MASTER
TRANSMITTER
MASTER
TRANSMITTER /
RECEIVER
MBA605
Fig.5 System configuration.
7.4 Acknowledge
The number of data bytes transferred between the start
and stop conditions from transmitter to receiver is
unlimited. Each byte of eight bits is followed by an
acknowledge bit. The acknowledge bit is a HIGH level
signal put on the bus by the transmitter during which time
the master generates an extra acknowledge related clock
pulse. A slave receiver which is addressed must generate
an acknowledge after the reception of each byte. Also a
master receiver must generate an acknowledge after the
reception of each byte that has been clocked out of the
slave transmitter.
The device that acknowledges must pull down the SDA
line during the acknowledge clock pulse, so that the SDA
line is stable LOW during the HIGH period of the
acknowledge related clock pulse (set-up and hold times
must be taken into consideration). A master receiver must
signal an end of data to the transmitter by not generating
an acknowledge on the last byte that has been clocked out
of the slave. In this event the transmitter must leave the
data line HIGH to enable the master to generate a stop
condition.
handbook, full pagewidth
START
condition
SCL FROM
MASTER
DATA OUTPUT
BY TRANSMITTER
DATA OUTPUT
BY RECEIVER
S
1
2
clock pulse for
acknowledgement
89
MBA606 - 1
Fig.6 Acknowledgement on the I2C-bus.
1997 Apr 02
6
6 Page Philips Semiconductors
128 × 8-bit EEPROM with I2C-bus interface
12 APPLICATION INFORMATION
12.1 Application example
Product specification
PCA8581; PCA8581C
handbook, full pagewidth
VDD
0 A0
SCL
0
PCA8581/PCA8581C
A1 '1010'
0 A2
TEST
VSS SDA
VDD
SDA
MASTER
TRANSMITTER/
SCL RECEIVER
VDD
VDD 1 A0
SCL
0
A1
PCA8581/PCA8581C
'1010'
0 A2
TEST
VSS SDA
V DD
VDD 1 A0
SCL
VDD
1
PCA8581/PCA8581C
A1 '1010'
VDD 1 A2
TEST
VSS SDA
V DD
R R R: pull up resistor
R
=
C
tr
BUS
SDA SCL
(I2C bus)
MLB893
Inputs A0, A1 and A2 must be connected to VDD of VSS but not left open-circuit.
Fig.12 Application diagram.
1997 Apr 02
12
12 Page | ||
Seiten | Gesamt 20 Seiten | |
PDF Download | [ PCA8581T Schematic.PDF ] |
Teilenummer | Beschreibung | Hersteller |
PCA8581 | 128 x 8-bit EEPROM with I2C-bus interface | NXP Semiconductors |
PCA8581 | 128 x 8-bit EEPROM with I2C-bus interface | NXP Semiconductors |
PCA8581C | 128 x 8-bit EEPROM with I2C-bus interface | NXP Semiconductors |
PCA8581C | 128 x 8-bit EEPROM with I2C-bus interface | NXP Semiconductors |
PCA8581CP | 128 x 8-bit EEPROM with I2C-bus interface | NXP Semiconductors |
Teilenummer | Beschreibung | Hersteller |
CD40175BC | Hex D-Type Flip-Flop / Quad D-Type Flip-Flop. |
Fairchild Semiconductor |
KTD1146 | EPITAXIAL PLANAR NPN TRANSISTOR. |
KEC |
www.Datenblatt-PDF.com | 2020 | Kontakt | Suche |