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PDF PC87364 Data sheet ( Hoja de datos )

Número de pieza PC87364
Descripción 128-Pin LPC SuperI/O with Extended Wake-Up and Protection Support
Fabricantes National Semiconductor 
Logotipo National Semiconductor Logotipo



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No Preview Available ! PC87364 Hoja de datos, Descripción, Manual

PRELIMINARY
January 10, 1999
PC87364
128-Pin LPC SuperI/O with Extended Wake-Up and
Protection Support
General Description
The PC87364, a member of National Semiconductor’s 128-
pin LPC SuperI/O family, introduces wake-up support for a
wide range of wake-up events, and new hardware and sof-
ware features to protect the system design. The PC87364
provides support for 51 GPIO ports, many with Assert
IRQ/SMI/PWUREQ capability. It is PC99 and ACPI compli-
ant, and offers a single-chip solution to the most commonly
used PC I/O peripherals.
The PC87364 also incorporates: Fan Speed Control and
Monitor (FSCM) for three fans, a Floppy Disk Controller
(FDC), a Keyboard and Mouse Controller (KBC), a full IEEE
1284 Parallel Port, two enhanced Serial Ports (UARTs), one
with Infrared (IR) support, an ACCESS.bus® Interface
(ACB), System Wake-Up Control (SWC), General-Purpose
Input/Output (GPIO) support for 51 ports, Interrupt Serializer
for Parallel IRQs and an enhanced WATCHDOGtimer.
Outstanding Features
Extended Wake-Up support, including legacy/ACPI
power button support, direct power supply control in
response to wake-up events, power-fail recovery
Protection features, including I/O access lock, chassis
hood lock/unlock, chassis intrusion detection, GPIO pin
attribute lock and pin configuration lock
Fan Speed Control and Monitor for three fans
Serial IRQ support (15 options)
Interrupt Serializer (11 Parallel IRQs to Serial IRQ)
Bus interface, based on Intel’s LPC Interface Specifi-
cation Revision 1.0, September 29th, 1997
ACCESS.bus Interface, SMBus physical layer compatible
q 51 GPIO Ports (39 standard, including 23 with Assert
IRQ/SMI/PWUREQs interrupts; 12 VSB-powered)
Blinking LEDs
128-pin PQFP Package
Block Diagram
Serial
Serial Infrared
Interface Interface Interface
I/O
Ports
Floppy Drive Parallel Port LPC Serial
Interface
Interface Interface IRQ SMI
Serial Port 1
Serial Port 2
with IR
GPIO Ports
Floppy Disk
Controller
IEEE 1284
Parallel Port
Bus
Interface
VDD
VBAT
VSB
System Wake-Up ACCESS.bus
Control
Interface
WATCHDOG
Fan Speed
Keyboard &
Timer
Control & Monitor Mouse Controller
Interrupt
Serializer
Power Wake-Up PWUREQ SCL SDA
Control Events
WDO
3 Control 3 Monitor Keyboard Ports
Outputs Inputs & Mouse I/F
Parallel
IRQs
ACCESS.bus® is a registered trademark of Digital Equipment Corporation.
I2C® is a registered trademark of Philips Corporation.
IBM®, MicroChannel®, PC-AT® and PS/2® are registered trademarks of International Business Machines Corporation.
Microsoft® and Windows® are registered trademarks of Microsoft Corporation.
TRI-STATE® is a registered trademark of National Semiconductor Corporation.
WATCHDOG‰ is a trademark of National Semiconductor Corporation.
SMBus® is a registered trademark of Intel Corporation.
© 1999 National Semiconductor Corporation
www.national.com

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PC87364 pdf
Table of Contents
Datasheet Revision Record .................................................................................................................... 4
1.0 Signal/Pin Connection and Description
1.1 CONNECTION DIAGRAM ......................................................................................................... 12
1.2 BUFFER TYPES AND SIGNAL/PIN DIRECTORY .................................................................... 13
1.3 PIN MULTIPLEXING ................................................................................................................. 18
1.4 DETAILED SIGNAL/PIN DESCRIPTIONS ................................................................................ 20
1.4.1 ACCESS.bus Interface (ACB) .................................................................................... 20
1.4.2 Bus Interface ............................................................................................................... 20
1.4.3 Clock ............................................................................................................................ 20
1.4.4 Fan Speed Control and Monitor (FSCM) ..................................................................... 20
1.4.5 Floppy Disk Controller (FDC) ...................................................................................... 21
1.4.6 Game Port .................................................................................................................. 22
1.4.7 General-Purpose Input/Output (GPIO) Ports ............................................................... 22
1.4.8 Infrared (IR) ................................................................................................................. 22
1.4.9 Keyboard and Mouse Controller (KBC) ..................................................................... 23
1.4.10 Musical Instrument Digital Interface (MIDI) Port .......................................................... 23
1.4.11 Parallel Port ............................................................................................................... 24
1.4.12 Power and Ground ..................................................................................................... 25
1.4.13 Protection .................................................................................................................... 25
1.4.14 Serial Port 1 and Serial Port 2 ..................................................................................... 25
1.4.15 Strap Configuration ...................................................................................................... 26
1.4.16 System Wake-Up Control ............................................................................................ 26
1.4.17 WATCHDOG Timer (WDT) ......................................................................................... 27
1.5 INTERNAL PULL-UP AND PULL-DOWN RESISTORS ............................................................ 28
2.0 Device Architecture and Configuration
2.1 OVERVIEW ............................................................................................................................... 30
2.2 CONFIGURATION STRUCTURE AND ACCESS ..................................................................... 30
2.2.1 The Index-Data Register Pair ...................................................................................... 30
2.2.2 Banked Logical Device Registers Structure ................................................................ 32
2.2.3 Standard Logical Device Configuration Register Definitions ....................................... 33
2.2.4 Standard Configuration Registers ............................................................................... 35
2.2.5 Default Configuration Setup ........................................................................................ 36
2.2.6 Power States ............................................................................................................... 36
2.2.7 Address Decoding ....................................................................................................... 37
2.3 PROTECTION ........................................................................................................................... 37
2.3.1 Chassis Intrusion Detection ......................................................................................... 37
2.3.2 Pin Configuration Lock ................................................................................................ 37
2.3.3 GPIO Pin Function Lock .............................................................................................. 38
2.4 POWER SUPPLY CONTROL (PSC) ......................................................................................... 38
2.5 LED OPERATION AND STATES .............................................................................................. 40
2.6 POWER SUPPLY CONTROL AND LED CONFIGURATION .................................................... 40
2.7 REGISTER TYPE ABBREVIATIONS ........................................................................................ 41
5 www.national.com

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PC87364 arduino
Table of Contents (Continued)
10.4 AC ELECTRICAL CHARACTERISTICS .................................................................................. 169
10.4.1 AC Test Conditions .................................................................................................... 169
10.4.2 Clock Timing .............................................................................................................. 169
10.4.3 LCLK and LRESET .................................................................................................... 170
10.4.4 LPC and SERIRQ Signals ......................................................................................... 171
10.4.5 Serial Port, Sharp-IR, SIR and Consumer Remote Control Timing ........................... 172
10.4.6 Modem Control Timing .............................................................................................. 173
10.4.7 FDC Write Data Timing ............................................................................................. 173
10.4.8 FDC Drive Control Timing ......................................................................................... 174
10.4.9 FDC Read Data Timing ............................................................................................. 174
10.4.10 Standard Parallel Port Timing .................................................................................... 175
10.4.11 Enhanced Parallel Port Timing .................................................................................. 175
10.4.12 Extended Capabilities Port (ECP) Timing .................................................................. 176
11 www.national.com

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