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PDF PC87360 Data sheet ( Hoja de datos )

Número de pieza PC87360
Descripción 128-Pin LPC SuperI/O with Protection and Extensive GPIO Support
Fabricantes National Semiconductor　
Logotipo National Semiconductor Logotipo



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No Preview Available ! PC87360 Hoja de datos, Descripción, Manual

PRELIMINARY
January 10, 1999
PC87360
128-Pin LPC SuperI/O with Protection and Extensive
GPIO Support
General Description
The PC87360 is the first member of National Semiconduc-
tor’s 128-pin SuperI/O family to support the Low Pin Count
(LPC) interface. It provides features to protect the system
design, and supports 45 GPIO ports, many with Assert
IRQ/SMI/PWUREQ capability. The PC87360 is PC99 and
ACPI compliant, and offers a single-chip solution to the
most commonly used PC I/O peripherals.
The PC87360 also incorporates: Fan Speed Control and
Monitoring for two fans, a Floppy Disk Controller (FDC), a
Keyboard and Mouse Controller (KBC), a full IEEE 1284
Parallel Port, two enhanced Serial Ports (UARTs), one with
Infrared (IR) support, an ACCESS.bus® Interface (ACB),
System Wake-Up Control (SWC), Interrupt Serializer for
Parallel IRQs and an enhanced WATCHDOG™ timer.
Outstanding Features
q Bus interface, based on Intel’s LPC Interface Specifi-
cation Revision 1.0, September 29th, 1997
q Protection features, including I/O access lock, GPIO
lock and pin configuration lock
q 45 GPIO Ports (37 standard, including 23 with Assert
IRQ/SMI/PWUREQs interrupts; 8 VSB-powered)
q Fan Speed Control and Monitor for two fans
q Interrupt Serializer (11 Parallel IRQs to Serial IRQ)
q Serial IRQ support (15 options)
q ACCESS.bus Interface, compatible with SMbus physi-
cal layer
q Blinking LEDs
q 128-pin PQFP Package
Block Diagram
Serial
Serial Infrared
Interface Interface Interface
I/O
Ports
Floppy Drive Parallel Port LPC Serial
Interface
Interface Interface IRQ SMI
Serial Port 1
Serial Port 2
with IR
GPIO Ports
Floppy Disk
Controller
IEEE 1284
Parallel Port
Bus
Interface
VDD
VBAT
VSB
System Wake-Up ACCESS.bus
Control
Interface
WATCHDOG
Fan Speed
Keyboard &
Timer
Control & Monitor Mouse Controller
Interrupt
Serializer
Wake-Up PWUREQ SCL SDA
Events
WDO
2 Control 2 Monitor Keyboard Ports
Outputs Inputs & Mouse I/F
Parallel
IRQs
ACCESS.bus® is a registered trademark of Digital Equipment Corporation.
I2C® is a registered trademark of Philips Corporation.
IBM®, MicroChannel®, PC-AT® and PS/2® are registered trademarks of International Business Machines Corporation.
Microsoft® and Windows® are registered trademarks of Microsoft Corporation.
TRI-STATE® is a registered trademark of National Semiconductor Corporation.
WATCHDOG‰ is a trademark of National Semiconductor Corporation.
SMBus® is a registered trademark of Intel Corporation.
© 1999 National Semiconductor Corporation
www.national.com

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PC87360 pdf
Table of Contents
Datasheet Revision Record .................................................................................................................... 4
1.0 Signal/Pin Connection and Description
1.1 CONNECTION DIAGRAM ......................................................................................................... 12
1.2 BUFFER TYPES AND SIGNAL/PIN DIRECTORY .................................................................... 13
1.3 PIN MULTIPLEXING ................................................................................................................. 17
1.4 DETAILED SIGNAL/PIN DESCRIPTIONS ................................................................................ 19
1.4.1 ACCESS.bus Interface (ACB) .................................................................................... 19
1.4.2 Bus Interface ............................................................................................................... 19
1.4.3 Clock ............................................................................................................................ 19
1.4.4 Fan Speed Control and Monitor (FSCM) ..................................................................... 19
1.4.5 Floppy Disk Controller (FDC) ...................................................................................... 20
1.4.6 General-Purpose Input/Output (GPIO) Ports ............................................................... 21
1.4.7 Infrared (IR) ................................................................................................................. 21
1.4.8 Keyboard and Mouse Controller (KBC) ..................................................................... 22
1.4.9 Parallel Port ............................................................................................................... 22
1.4.10 Power and Ground ..................................................................................................... 23
1.4.11 Protection .................................................................................................................... 24
1.4.12 Serial Port 1 and Serial Port 2 ..................................................................................... 24
1.4.13 Strap Configuration ...................................................................................................... 25
1.4.14 System Wake-Up Control ............................................................................................ 25
1.4.15 WATCHDOG Timer (WDT) ......................................................................................... 25
1.5 INTERNAL PULL-UP AND PULL-DOWN RESISTORS ............................................................ 26
2.0 Device Architecture and Configuration
2.1 OVERVIEW ............................................................................................................................... 29
2.2 CONFIGURATION STRUCTURE AND ACCESS ..................................................................... 29
2.2.1 The Index-Data Register Pair ...................................................................................... 29
2.2.2 Banked Logical Device Registers Structure ................................................................ 31
2.2.3 Standard Logical Device Configuration Register Definitions ....................................... 32
2.2.4 Standard Configuration Registers ............................................................................... 34
SuperI/O Control and Configuration Registers ............................................................ 34
Logical Device Control and Configuration Registers ................................................... 34
Control ......................................................................................................................... 35
Standard Configuration ................................................................................................ 35
Special Configuration .................................................................................................. 35
2.2.5 Default Configuration Setup ........................................................................................ 35
2.2.6 Power States ............................................................................................................... 35
2.2.7 Address Decoding ....................................................................................................... 36
2.3 INTERRUPT SERIALIZER ........................................................................................................ 36
2.4 PROTECTION ........................................................................................................................... 37
2.4.1 Access Lock to I/O Ports ............................................................................................. 37
2.4.2 Pin Configuration Lock ................................................................................................ 37
2.4.3 GPIO Pin Function Lock .............................................................................................. 37
5 www.national.com

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PC87360 arduino
Table of Contents (Continued)
10.0 Device Characteristics
10.1 GENERAL DC ELECTRICAL CHARACTERISTICS ............................................................... 155
10.1.1 Recommended Operating Conditions ....................................................................... 155
10.1.2 Absolute Maximum Ratings ....................................................................................... 155
10.1.3 Capacitance .............................................................................................................. 155
10.1.4 Power Consumption under Recommended Operating Conditions ............................ 156
10.2 DC CHARACTERISTICS OF PINS, BY I/O BUFFER TYPES ................................................ 156
10.2.1 Input, CMOS Compatible ........................................................................................... 156
10.2.2 Input, PCI 3.3V .......................................................................................................... 156
10.2.3 Input, SMBus Compatible .......................................................................................... 157
10.2.4 Input, Strap Pin .......................................................................................................... 157
10.2.5 Input, TTL Compatible ............................................................................................... 157
10.2.6 Input, TTL Compatible with Schmitt Trigger .............................................................. 157
10.2.7 Output, PCI 3.3V ....................................................................................................... 158
10.2.8 Output, Totem-Pole Buffer ......................................................................................... 158
10.2.9 Output, Open-Drain Buffer ......................................................................................... 158
10.2.10 Exceptions ................................................................................................................. 158
10.3 INTERNAL RESISTORS ......................................................................................................... 159
10.3.1 Pull-Up Resistor ......................................................................................................... 159
10.3.2 Pull-Down Resistor .................................................................................................... 159
10.4 AC ELECTRICAL CHARACTERISTICS .................................................................................. 160
10.4.1 AC Test Conditions .................................................................................................... 160
10.4.2 Clock Timing .............................................................................................................. 160
10.4.3 LCLK and LRESET .................................................................................................... 161
10.4.4 LPC and SERIRQ Signals ......................................................................................... 162
10.4.5 Serial Port, Sharp-IR, SIR and Consumer Remote Control Timing ........................... 163
10.4.6 Modem Control Timing .............................................................................................. 164
10.4.7 FDC Write Data Timing ............................................................................................. 164
10.4.8 FDC Drive Control Timing ......................................................................................... 165
10.4.9 FDC Read Data Timing ............................................................................................. 165
10.4.10 Standard Parallel Port Timing .................................................................................... 166
10.4.11 Enhanced Parallel Port Timing .................................................................................. 166
10.4.12 Extended Capabilities Port (ECP) Timing .................................................................. 167
11 www.national.com

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