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What is PC87332VLJ-5?

This electronic component, produced by the manufacturer "National Semiconductor", performs the same function as "PC87332VLJ (3.3V/5V) and PC87332VLJ-5 (5V) (SuperI/OTM III Premium Green) Floppy Disk Controller/ Dual UARTs/ IEEE1284 Parallel Port/ and IDE Interfac".


PC87332VLJ-5 Datasheet PDF - National Semiconductor

Part Number PC87332VLJ-5
Description PC87332VLJ (3.3V/5V) and PC87332VLJ-5 (5V) (SuperI/OTM III Premium Green) Floppy Disk Controller/ Dual UARTs/ IEEE1284 Parallel Port/ and IDE Interfac
Manufacturers National Semiconductor 
Logo National Semiconductor Logo 


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PRELIMINARY
May 1995
PC87332VLJ (3 3V 5V) and PC87332VLJ-5 (5V)
(SuperI OTM III Premium Green)
Floppy Disk Controller Dual UARTs IEEE1284
Parallel Port and IDE Interface
General Description
The PC87332VLJ and PC87332VLJ-5 are single chip solu-
tions for most commonly used I O peripherals in ISA EISA
and MicroChannel based computers It incorporates a
Floppy Disk Controller (FDC) two full featured UARTs an
IEEE 1284 compatible parallel port and all the necessary
control logic for an IDE interface Standard PC-AT address
decoding for all the peripherals and a set of configuration
registers are also implemented in this highly integrated
member of the SuperI O family Advanced power manage-
ment features and mixed voltage operation in the VLJ ver-
sion make the PC87332 chips an ideal for low-power and or
portable personal computer applications
The PC87332 FDC uses a high performance digital data
separator eliminating the need for any external filter compo-
nents It is fully compatible with the PC8477 and incorpo-
rates a superset of DP8473 NEC mPD765 and N82077 flop-
py disk controller functions All popular 5 25 and 3 5 flop-
py drives including the 2 88 MB 3 5 floppy drive are sup-
ported In addition automatic media sense and 2 Mbps tape
drive support are provided by the FDC
The two UARTs are fully NS16450 and NS16550 compati-
ble Both ports support MIDI baud rates
(Continued)
Features
Y Floppy Disk Controller
Software compatible with the DP8473 the 765A and
the N82077
16-byte FIFO (disabled by default)
Burst and Non-Burst modes
Perpendicular Recording drive support
New high-performance internal digital data separator
(no external filter components required)
Low-power CMOS with enhanced power-down mode
Automatic media-sense support
Supports fast 2 Mbps and standard 1 Mbps
500 kbps 250 kbps tape drives
Y Bidirectional Parallel Port
Enhanced Parallel Port (EPP) compatible
Extended Capabilities Port (ECP) compatible includ-
ing level 2 support
Bidirectional under either software or hardware
control
Ability to multiplex FDC signals on parallel port pins
allows use of an external Floppy Disk Drive (FDD)
Includes protection circuit to prevent damage to the
parallel port when a connected printer is powered up
or is operated at a higher voltage
(Continued)
Block Diagram
TRI-STATE is a registered trademark of National Semiconductor Corporation
SuperI OTM is a trademark of National Semiconductor Corporation
IBM MicroChannel PC-AT and PS 2 are registered trademarks of International Business Machines Corporation
C1995 National Semiconductor Corporation TL C 11930
TL C 11930 – 1
RRD-B30M65 Printed in U S A

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PC87332VLJ-5 equivalent
FIGURE 2-1
FIGURE 2-2
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FIGURE 5-1
FIGURE 5-2
FIGURE 5-3
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FIGURE 6-2
FIGURE 7-1
FIGURE 7-2
FIGURE 7-3
FIGURE 7-4
FIGURE 7-5
FIGURE 7-6
FIGURE 7-7
FIGURE 8-1
FIGURE 9-1
FIGURE 9-2
FIGURE 9-3
FIGURE 9-4
FIGURE 9-5
FIGURE 9-6a
FIGURE 9-6b
FIGURE 9-6c
FIGURE 9-6d
FIGURE 9-7
FIGURE 9-8
FIGURE 9-9
FIGURE 9-10
FIGURE 9-11
FIGURE 9-12
FIGURE 9-13
FIGURE 9-14
FIGURE 9-15
FIGURE 9-16
FIGURE 9-17
FIGURE 9-18
FIGURE 9-19
List of Figures
PC87332VLJ PC87332VLJ-5 Configuration Registers
PC87332 Four Floppy Drive Circuit Example
FDC Functional Block Diagram
FDC Command Structure
IBM Perpendicular and ISO Formats Supported by the Format Command
PC87332 Dynamic Window Margin Performance
Read Data Algorithm State Diagram
Perpendicular Recording Drive R W Head and Pre-Erase Head
PC87332 Composite Serial Data
Reciever FIFO Trigger Level
EPP 1 7 Address Write
EPP 1 7 Address Read
EPP Write with ZWS
EPP 1 9 Address Write
EPP 1 9 Address Read
ECP (Forward) Write Cycle
ECP (Backward) Read Cycle
IDE Interface Signal Equations (Non-DMA)
Clock Timing
Microprocessor Read Timing
Microprocessor Write Timing
Baud Out Timing
Transmitter Timing
Sample Clock Timing
Receiver Timing
Mode Receiver Timing
Timeout Receiver Timing
MODEM Control Timing
DMA Timing
Reset Timing
Write Data Timing
Drive Control Timing
Read Data Timing
IDE Timing
Compatible Mode Parallel Port Interrupt Timing
Extended Mode Parallel Port Interrupt Timing
Typical Parallel Port Data Exchange
Enhanced Parallel Port Timing
ECP Parallel Port Forward Timing Diagram
ECP Parallel Port Backward Timing Diagram
5


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Featured Datasheets

Part NumberDescriptionMFRS
PC87332VLJ-5The function is PC87332VLJ (3.3V/5V) and PC87332VLJ-5 (5V) (SuperI/OTM III Premium Green) Floppy Disk Controller/ Dual UARTs/ IEEE1284 Parallel Port/ and IDE Interfac. National SemiconductorNational Semiconductor

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