PC87307 Datasheet PDF - National Semiconductor
| Part Number | PC87307 | |
| Description | PC87307/PC97307 Plug and Play Compatible and PC97 Compliant SuperI/O | |
| Manufacturers | National Semiconductor | |
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PRELIMINARY
March 1998
PC87307/PC97307 Plug and Play Compatible and PC97
Compliant SuperI/O
Highlights
General Description
The PC87307/PC97307 (VUL) are functionally identical
parts that offer a single-chip solution to the most commonly
used ISA, EISA and MicroChannel® peripherals. This fully
Plug and Play (PnP) compatible chip incorporates a Floppy
Disk Controller (FDC), a Keyboard and mouse Controller
(KBC), a Real-Time Clock (RTC), two fast full function
UARTs, Infrared (IR) support, a full IEEE 1284 parallel port,
three general purpose chip select signals that can be pro-
grammed for game port control, and a separate configura-
tion register set for each module. It also provides support for
power management (including a WATCHDOG timer) and
standard PC-AT address decoding for on-chip functions.
The Plug and Play (PnP) support in the device conforms to
the “Plug and Play ISA Specification” Version 1.0a, May 5,
1994.
The Infrared (IR) interface complies with the IrDA 1.0 SIR
and SHARP-IR standards, and supports all four basic pro-
tocols for Consumer-IR (TV-Remote) circuitry (RC-5, RC-5
extended, RECS80 and NEC).
Features
s 100% compatible with Plug and Play requirements
specified in the “Plug and Play ISA Specification”, ISA,
EISA, and MicroChannel architectures
s Meets PC97 requirements
Block Diagram
DMA
IRQ Channels
Control
Serial Infrared
Data Control Interface Interface Interrupt
Real-Time Clock
Plug and Play (RTC and APC)
(PnP)
(Logical Device 2)
X-Bus
µP Address
Data and
Control
Two UARTs + IR
(16550 or 16450)
(Logical Devices 5 & 6)
Floppy Disk
Controller (FDC)
with Digital Data
Separator (DDS)
(PC8477)
Floppy
Drive
Interface
(Logical Device 3)
Keyboard
Controller (KBC)
(Logical Device 0)
Power Management
Logic
(Logical Device 8)
IEEE1284
Parallel Port
(Logical Device 4)
High Current Driver
Mouse
Controller
(Logical Device 1)
General Purpose
I/O Registers
(Logical Device 7)
Data and Ports
Control
Control
Data Handshake
Data and
Control
I/O Ports
TRI-STATE® is a registered trademark of National Semiconductor Corporation.
IBM®, MicroChannel®, PC-AT® and PS/2® are registered trademarks of International Business Machines Corporation.
Microsoft® and Windows® are registered trademarks of Microsoft Corporation.
© 1998 National Semiconductor Corporation
www.national.com
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Table of Contents
Table of Contents
Highlights ............................................................................................................................. 1
1.0 Signal/Pin Connection and Description
1.1 CONNECTION DIAGRAM ......................................................................................................... 14
1.2 SIGNAL/PIN DESCRIPTIONS ................................................................................................... 15
2.0 Configuration
2.1 HARDWARE CONFIGURATION ............................................................................................... 24
2.1.1 Wake Up Options ........................................................................................................ 24
2.1.2 The Index and Data Register Pair ............................................................................... 24
2.1.3 The Strap Pins ............................................................................................................. 25
2.2 SOFTWARE CONFIGURATION ............................................................................................... 25
2.2.1 Accessing the Configuration Registers ........................................................................ 25
2.2.2 Address Decoding ....................................................................................................... 25
2.3 THE CONFIGURATION REGISTERS ....................................................................................... 26
2.3.1 Standard Plug and Play (PnP) Register Definitions .................................................... 27
2.3.2 Configuration Register Summary ................................................................................ 30
2.4 CARD CONTROL REGISTERS ................................................................................................ 34
2.4.1 SID Register (In PC87307) .......................................................................................... 34
2.4.2 SID Register (In PC97307) .......................................................................................... 34
2.4.3 SuperI/O Configuration 1 Register, Index 21h ............................................................. 34
2.4.4 SuperI/O Configuration 2 Register, Index 22h ............................................................. 35
2.4.5 Programmable Chip Select Configuration Index Register, Index 23h ......................... 35
2.4.6 Programmable Chip Select Configuration Data Register, Index 24h .......................... 36
2.4.7 SRID Register (In PC97307 only) ................................................................................ 36
2.5 KBC CONFIGURATION REGISTER (LOGICAL DEVICE 0) .................................................... 36
2.5.1 SuperI/O KBC Configuration Register, Index F0h ....................................................... 36
2.6 FDC CONFIGURATION REGISTERS (LOGICAL DEVICE 3) .................................................. 36
2.6.1 SuperI/O FDC Configuration Register, Index F0h ....................................................... 36
2.6.2 Drive ID Register, Index F1h ....................................................................................... 37
2.7 PARALLEL PORT CONFIGURATION REGISTER (LOGICAL DEVICE 4) ............................... 37
2.7.1 SuperI/O Parallel Port Configuration Register, Index F0h ........................................... 37
2.8 UART2 AND INFRARED CONFIGURATION REGISTER (LOGICAL DEVICE 5) .................... 38
2.8.1 SuperI/O UART2 Configuration Register, Index F0h ................................................... 38
2.9 UART1 CONFIGURATION REGISTER (LOGICAL DEVICE 6) ................................................ 38
2.9.1 SuperI/O UART1 Configuration Register, Index F0h ................................................... 38
2.10 PROGRAMMABLE CHIP SELECT CONFIGURATION REGISTERS ...................................... 39
2.10.1 CS0 Base Address MSB, Second Level Index 00h ..................................................... 39
2.10.2 CS0 Base Address LSB Register, Second Level Index 01h ....................................... 39
2.10.3 CS0 Configuration Register, Second Level Index 02h ................................................ 39
2.10.4 Reserved, Second Level Index 03h ............................................................................. 39
2.10.5 CS1 Base Address MSB Register, Second Level Index 04h ...................................... 40
2.10.6 CS1 Base Address LSB Register, Second Level Index 05h ....................................... 40
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| Information | Total 30 Pages | |
| Link URL | [ Copy URL to Clipboard ] | |
| Download | [ PC87307.PDF Datasheet ] | |
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