|
|
Teilenummer | Q-67106-H6514 |
|
Beschreibung | PLL-Frequency Synthesizer PMB2306R/PMB2306T Version 2.2 | |
Hersteller | Siemens Semiconductor Group | |
Logo | ||
Gesamt 35 Seiten ICs for Communications
PLL-Frequency Synthesizer
PMB2306R/PMB2306T Version 2.2
Data Sheet 02.97
T2306-0V22-D1-7600
30% 530%7
3LQ 'HILQLWLRQV DQG )XQFWLRQV
2YHUYLHZ
7DEOH
'62 76623 6\PERO )XQFWLRQ
66
22
11 13
9DD
9SS
9DD1
Positive supply voltage for serial control logic.
Ground for serial control logic.
Positive supply voltage for the preamplifiers, counters, phase
detector and charge pump.
9 11
9SS1 Ground for the preamplifiers, counters, phase detector and
charge pump.
(1RWH 7KH SLQV 9'' DQG 9'' UHVSHFWLYHO\ 966 DQG 966
KDYH WR KDYH WKH VDPH VXSSO\ YROWDJH.)
33
EN /LQH %XV (QDEOH
Enable line of the serial control with internal pull-up resistor.
When EN = H the input signals CLK and DA are disabled
internally. When EN = L the serial control is activated. The
received data are transferred into the latches with the positive
edge of the EN-signal.
44
DA /LQH %XV 'DWD
Serial data input with internal pull-up resistor. The last two bits
before the EN-signal define the destination address. In a byte-
oriented data structure the transmitted data have to end with
the EN-signal, i.e. bits to be filled in (don’t care) are transmitted
first.
55
CLK
/LQH %XV &ORFN
Clock line with internal pull-up resistor. The serial data are read
into the internal shift register with the positive edge (see pulse
diagram for serial data control).
77
MOD
0RGXOXV &RQWURO 2XWSXW for external dual modulus prescaler.
The modulus output is low at the beginning of the cycle. When
the a-counter has reached its set value, MOD switches to high.
When the n-counter has reached its set value, MOD switches to
low again, and the cycle starts from the top. When the prescaler
has the counter factor P or P + 1 (P for MOD = H, P +1 for MOD
= L), the overall scaling factor is NP + A. The value of the a-
counter must be smaller than that of the n-counter. The trigger
edge of the modulus signal to the input signal can be selected
(see programming tables and MOD
A, B) according to the needs of the prescaler. In single modulus
operation and for standby operation in dual modulus operation,
the output is low.
Semiconductor Group
6
02.97
6 Page 30% 530%7
3URJUDPPLQJ 7DEOHV
6WDWXV %LWV
0RGH
0
0
1
1
0RGH
0
1
0
1
0XOWLIXQFWLRQ 2XWSXWV
0)2
0)2
IRN
ΦV
ΦVN
Port 1
IVN
ΦRN
ΦRN
,REF
&LUFXLW 'HVFULSWLRQ
5HPDUNV
test mode
external charge pump mode 1
external charge pump mode 2
internal charge pump mode
6WDWXV %LWV
3'&XUUHQW
0
0
0
0
1
1
1
1
3'&XUUHQW
0
0
1
1
0
0
1
1
3'&XUUHQW
0
1
0
1
0
1
0
1
3'&XUUHQW 0RGH
0.175
0.25
0.35
0.5
0.7
1
1.4
2
3URJUDPPLQJ 7DEOHV (cont’d)
6WDWXV %LWV
$QWL%DFNODVK
3XOVH :LGWK
$QWL%DFNODVK
3XOVH :LGWK
WZ W\S
>QV@
$SSOLFDWLRQ
0 0 1.3* 9DD = 5 V
0 15
1 0 10 not recommended
1 1 13** any application where
continuous lock detect required
* In general the shortest anti-backlash pulse gives the best system performance.
** No ABL (Anti-Backlash-Pulse) gating performed. This means, that at the LD output the anti-backlash pulse
will appear. In the other cases the anti-backlash pulse will be surpressed at the LD output.
Semiconductor Group
12
02.97
12 Page | ||
Seiten | Gesamt 35 Seiten | |
PDF Download | [ Q-67106-H6514 Schematic.PDF ] |
Teilenummer | Beschreibung | Hersteller |
Q-67106-H6514 | PLL-Frequency Synthesizer PMB2306R/PMB2306T Version 2.2 | Siemens Semiconductor Group |
Teilenummer | Beschreibung | Hersteller |
CD40175BC | Hex D-Type Flip-Flop / Quad D-Type Flip-Flop. |
Fairchild Semiconductor |
KTD1146 | EPITAXIAL PLANAR NPN TRANSISTOR. |
KEC |
www.Datenblatt-PDF.com | 2020 | Kontakt | Suche |