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Teilenummer | R2000 |
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Beschreibung | HIGH VOLTAGE RECTIFIER | |
Hersteller | Diodes Incorporated | |
Logo | ||
Gesamt 14 Seiten R1LV0408C-I Series
Wide Temperature Range Version
4M SRAM (512-kword × 8-bit)
REJ03C0098-0200Z
Rev. 2.00
May.25.2004
Description
The R1LV0408C-I is a 4-Mbit static RAM organized 512-kword × 8-bit. R1LV0408C-I Series has
realized higher density, higher performance and low power consumption by employing CMOS process
technology (6-transistor memory cell). The R1LV0408C-I Series offers low power standby power
dissipation; therefore, it is suitable for battery backup systems. It has packaged in 32-pin SOP, 32-pin
TSOP II and 32-pin STSOP.
Features
• Single 3 V supply: 2.7 V to 3.6 V
• Access time: 55/70 ns (max)
• Power dissipation:
Active: 6 mW/MHz (typ)
Standby: 1.5 µW (typ)
• Completely static memory.
No clock or timing strobe required
• Equal access and cycle times
• Common data input and output.
Three state output
• Directly TTL compatible.
All inputs and outputs
• Battery backup operation.
• Operating temperature: −40 to +85°C
Rev.2.00, May.25.2004, page 1 of 12
R1LV0408C-I Series
DC Characteristics
Parameter
Symbol Min Typ Max Unit Test conditions
Input leakage current
|ILI|
1 µA Vin = VSS to VCC
Output leakage current
Operating current
Average operating current
Standby current
|ILO|
ICC
ICC1
ICC2
ISB
1 µA CS# = VIH or OE# = VIH or
WE# = VIL or VI/O = VSS to VCC
5*1 10 mA CS# = VIL,
Others = VIH/ VIL, II/O = 0 mA
8*1 25 mA Min. cycle, duty = 100%,
CS# = VIL, Others = VIH/VIL
II/O = 0 mA
2*1 5 mA Cycle time = 1 µs,
duty = 100%,
II/O = 0 mA, CS# ≤ 0.2 V,
VIH ≥ VCC − 0.2 V, VIL ≤ 0.2 V
0.1*1 0.3 mA CS# = VIH
Standby −5SI
current
to +85°C
to +70°C
to +40°C
to +25°C
ISB1
ISB1
ISB1
ISB1
10 µA Vin ≥ 0 V, CS# ≥ VCC − 0.2 V
8 µA
0.7*2 3 µA
0.5*1 3 µA
−7LI to +85°C
ISB1
20 µA
to +70°C
to +40°C
to +25°C
ISB1
ISB1
ISB1
16
0.7*2 10
0.5*1 10
µA
µA
µA
Output low voltage
VOL
0.4 V IOL = 2.1 mA
VOL2
0.2 V IOL = 100 µA
Output high voltage
VOH 2.4
V IOH = −1.0 mA
VOH2 VCC − 0.2 V IOH = −0.1 mA
Notes: 1. Typical values are at VCC = 3.0 V, Ta = +25°C and specified loading, and not guaranteed.
2. Typical values are at VCC = 3.0 V, Ta = +40°C and specified loading, and not guaranteed.
Capacitance
(Ta = +25°C, f = 1.0 MHz)
Parameter
Symbol Min Typ Max Unit Test conditions
Input capacitance
Cin
8
pF Vin = 0 V
Input/output capacitance
CI/O 10 pF VI/O = 0 V
Note: 1. This parameter is sampled and not 100% tested.
Note
1
1
Rev.2.00, May.25.2004, page 6 of 12
6 Page R1LV0408C-I Series
Low VCC Data Retention Characteristics
(Ta = −40 to +85°C)
Parameter
Symbol Min Typ Max Unit Test conditions*3
VCC for data retention
VDR 2.0 V CS# ≥ VCC − 0.2 V, Vin ≥ 0 V
Data
retention
current
−5SI
to +85°C
to +70°C
to +40°C
to +25°C
ICCDR
ICCDR
ICCDR
ICCDR
10 µA VCC = 3.0 V, Vin ≥ 0 V
8
0.7*2 3
µA CS# ≥ VCC − 0.2 V
µA
0.5*1 3 µA
−7LI
to +85°C
ICCDR
20 µA
to +70°C
to +40°C
to +25°C
ICCDR
ICCDR
ICCDR
16 µA
0.7*2 10 µA
0.5*1 10 µA
Chip deselect to data retention time
Operation recovery time
tCDR
tR
0
tRC*4
ns See retention waveform
ns
Notes: 1. Typical values are at VCC = 3.0 V, Ta = +25°C and specified loading, and not guaranteed.
2. Typical values are at VCC = 3.0 V, Ta = +40°C and specified loading, and not guaranteed.
3. CS# controls address buffer, WE# buffer, OE# buffer, and Din buffer. In data retention mode,
Vin levels (address, WE#, OE#, I/O) can be in the high impedance state.
4. tRC = read cycle time.
Low VCC Data Retention Timing Waveform (CS# Controlled)
VCC
2.7 V
tCDR
Data retention mode
tR
2.2 V
VDR
CS#
0V
CS# ≥ VCC – 0.2 V
Rev.2.00, May.25.2004, page 12 of 12
12 Page | ||
Seiten | Gesamt 14 Seiten | |
PDF Download | [ R2000 Schematic.PDF ] |
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