Datenblatt-pdf.com


PBL386102QNT Schematic ( PDF Datasheet ) - Ericsson

Teilenummer PBL386102QNT
Beschreibung Subscriber Line Interface Circuit
Hersteller Ericsson
Logo Ericsson Logo 




Gesamt 18 Seiten
PBL386102QNT Datasheet, Funktion
February 1999
PBL 386 10/2
Subscriber Line
Interface Circuit
Description
The PBL 386 10/2 Subscriber Line Interface Circuit (SLIC) is a 90 V bipolar integrated
circuit for use in PBX, Terminal adapters and other telecommunications equipment.
The PBL 386 10/2 has been optimized for low total line interface cost and a high
degree of flexibility in different applications.
The PBL 386 10/2 emulates a transformer equivalent dc-feed, programmable
between 2x25 and 2x900 , with short loop current limiting adjustable to max
65 mA.
A second lower battery voltage may be connected to the device to reduce short
loop power dissipation. The SLIC automatically switches between the two battery
supply voltages without need for external components or external control.
The SLIC incorporates loop current, ground key and ring trip detection functions. The
PBL 386 10/2 is compatible with loop start signalling.
Two- to four-wire and four- to two-wire voice frequency (vf) signal conversion is
accomplished by the SLIC in conjunction with either a conventional CODEC/filter or
with a programmable CODEC/filter, e.g. SLAC, SiCoFi, Combo II. The programmable
line terminating impedance could be complex or real to fit every market.
Longitudinal line voltages are suppressed by a feedback loop in the SLIC and the
longitudinal balance specifications meet Bellcore TR909 requirements.
The PBL 386 10/2 package is 28-pin PLCC.
DT
DR
TIPX
RINGX
HP
TS
VEE
AOV
VBAT2
VBAT
BGND
Two-wire
Interface
Ring Trip
Comparator
Ground Key
Detector
Line Feed
Controller
and
Longitudinal
Signal
Suppression
Off-hook
Detector
VF Signal
Transmission
Ring Relay
Driver
Input
Decoder and
Control
RRLY
C1
C2
C3
VCC
DET
PSG
LP
REF
PLC
PLD
AGND
VTX
RSN
VEE
Key Features
• Selectable overhead voltage principle
– All adaptive: The overhead voltage
follows 0.6 VPeak < signals < 5 VPeak.
– Semi adaptive: The overhead voltage
follows 2.5 VPeak < signals < 5 VPeak.
• Metering 1.6Vrms
• High and low battery with automatic
switching
• Battery supply as low as -10V
• Only +5V in addition to GND
and battery (VEE optional)
• 35 mW on-hook power dissipation in
active state
• Long loop battery feed tracks VBat for
maximum line voltage
• 44V open loop voltage @ -48 V battery
feed
• Constant loop voltage for line
leakage <5 mA
• On-hook transmission
• Full longitudinal current capability
during on-hook
• Programmable loop & ring-trip detector
threshold
• Ground key detector
• Analog temperature guard
• Integrated Ring Relay Driver
Figure 1. Block diagram.
28-pin plastic PLCC
1






PBL386102QNT Datasheet, Funktion
PBL 386 10/2
Parameter
Ref
fig Conditions
Min
Loop current detector
Programmable threshold, IDET
ILTh > 10 mA
Ground key detector
ILTh
=
500
RLD
0.9•ILTh
Ground key detector threshold
I and I current difference to trigger ground key det.
LTIPX
LRINGX
Ring trip comparator
Offset voltage, VDTDR
Input bias current, I
B
Input common mode range, V , V
DT DR
Source resistance, RS = 0
I = (I + I )/2
B DT DR
Ring relay driver
11
-20
-50
V +1
Bat
Saturation voltage, VOL
Off state leakage current, ILk
Digital inputs (C1, C2, C3)
Input low voltage, VIL
Input high voltage, VIH
Input low current, |IIL|
Input high current, I
IH
Detector output (DET)
Output low voltage, VOL
Internal pull-up resistor to V
CC
Power dissipation (VBat = -48V, VBat2 = -32V)
P
1
P2 @ VEE = -5V
P3 @ VEE = -48V
P4 @ VEE = -5V
P @ VEE = -5V
5
Power supply currents (V = -48V)
Bat
VCC current, ICC
VEE current, IEE
VBat current, IBat
VCC current, ICC
VEE current, IEE
V current, I , On-hook
Bat Bat
Power supply rejection ratios
VCC to 2- or 4-wire port
VEE to 2- or 4-wire port
V to 2- or 4-wire port
Bat
VBat2 to 2- or 4-wire port
Temperature guard
IOL = 50 mA
VOH = 12 V
VIL = 0.5
V = 2.5 V
IH
IOL = 1 mA
0
2.5
0.1
Open circuit state, C1, C2, C3 = 0, 0, 0
Active state, C1, C2, C3 = 0, 1, 0
Longitudinal current = 0 mA, IL = 0 mA
RL = 300(off-hook)
R
L
=
800
(off-hook)
Open circuit state
C1, C2, C3 = 0, 0, 0
Active state
C1, C2, C3 = 0, 1, 0
Long Current = 0 mA, I = 0 mA
L
-0.2
-0.2
-0.8
Active State
C1, C2, C3 = 0, 1, 0
f = 1 kHz, V = 100mV
n
30
28.5
40
28.5
Junction threshold temperature, T
JG
140
Typ
ILTh
15
0
-20
0.2
0.6
10
10
35
39
710
340
1.0
-0.1
-0.1
2.1
0.1
-0.5
45
55
50
60
Max Unit
1.1•ILTh mA
19 mA
20 mV
nA
-1 V
0.5 V
100 µA
0.5 V
VCC V
200 µA
200 µA
V
k
14 mW
42 mW
46 mW
mW
mW
1.4 mA
mA
mA
3.5 mA
0.3 mA
mA
dB
dB
dB
dB
°C
6

6 Page









PBL386102QNT pdf, datenblatt
PBL 386 10/2
High-Pass Transmit Filter
When CODEC/filter with a singel 5 V power
supply is used, it is necessary to separate
the different signal reference voltages be-
tween the SLIC and the CODEC/filter. In
the transmit direction this can be done by
connecting a capacitor between the VTX
output of the SLIC and the CODEC/filter
input. This capacitor will also form, togeth-
er with RTX and/or the input impedance of
the CODEC/filter, a high-pass RC filter. It is
recommended to position the 3 dB break
point of this filter between 30 and 80 Hz to
get a fast enough response for the dc steps
that may occur with DTMF signaling.
Capacitor CLP
The capacitor CLP, which connects between
the terminals LP and VBAT, positions the
high end frequency break point of the low
pass filter in the dc loop in the SLIC. CLP
together with CHP and ZT (see section Two-
Wire Impedance) forms the total two wire
output impedance of the SLIC. The choice
of these programming components influ-
ence the power supply rejection ratio
(PSRR) from VBAT to the two wire side in
the low frequency range.
RFeed
[]
RSG CLP CHP
[k] [nF] [nF]
225 4.02 330 68
250 23.7 330 68
2200
147 100 33
2400
301 47 33
2800
619 22 33
Table 1. RSG, CLP and CHP values for
different feeding characteristics.
Table 1 suggest values of CLP and CHP for
different feeding characteristics.
For values outside table 1, please con-
tact Ericsson Microelectronics for assist-
ance.
Adaptive Overhead Voltage, AOV
The Adaptive Overhead Voltage feature
minimises the power dissipation and at the
same time provides a flexible solution for
differing system requirements and possi-
ble future changes concerning voice, me-
tering and other signal levels. This is done
by using an overhead voltage which auto-
matically adapts to the signal level (voice +
metering). With the AOV-pin left open, the
PBL 386 10/2 will behave as a SLIC with
fixed overhead voltage for signals in the 0
- 20kHz frequency range and with an ampli-
Figure 11. The AOV funktion when the AOV-pin is left open. (Observe, burst
undersampled).
tude less than 2.5VPeak11. For signal ampli-
tudes between 2.5VPeak and 5.0VPeak, the
AOV-function will expand the overhead
voltage making it possible for the signal, Vt,
to propagate through the SLIC without dis-
tortion (see figure 11). The expansion of
the overhead voltage occurs instantane-
ously. When the signal amplitude decreas-
es, the overhead voltage returns to its initial
value with a time constant of approximately
one second.
If the AOV-pin is connected to AGND, the
overhead voltage will automatically be ad-
justed for signal levels between 0.6 VPeak
and 5.0 VPeak.
AOV In the Constant Current Region
When the overhead voltage is automatical-
ly increased, the apparent battery (VApp,
reference F in figure 13), will be reduced by
the
signal
amplitude
minus
2.5
V ,(11)
Peak
(Vt
- 2.5(11)).
In the constant current region this change
will not affect the line current as long as
VTR < VApp - (ILConst RFeed) - (Vt- 2.5(11)),
(references A-C in figure 13).
AOV In the Resistive Loop Feed
Region
The saturation guard will be activated when
the SLIC is working in the resistive loop
feed region, i.e.
VTR > VApp - (ILConst RFeed) - (Vt - 2.5(11))
(references D in figure 13).
If the signal amplitude is greater than
2.5VPeak11 the line current, IL, will be re-
duced corresponding to the formula
IL = | (Vt - 2.5(11))/(RL + RFeed) |.
This reduction of line current will intro-
duce a transversal signal into the two-wire
which under some circumstances may be
audible (e g when sending metering sig-
nals > 2.5 VPeak without any speech signal
burying the transversal signal generated
from the linecurrent reduction).
The sum of all signals should not exceed
5.0 VPeak.
Line Feed
If V < V - (I • R ), the PBL 386 10/
TR App LConst Feed
2 SLIC will emulate constant current feed
(references A-C in figure 13).
For VTR > VApp - (ILConst RFeed) the PBL 386
10/2 SLIC will emulate resistive loop feed
programmable between 225 12 and 2900
(references D in figure 13). The current
limitation region is adjustable between 0
mA and 65 mA13.
When the line current is approaching
open loop conditions, the overhead volt-
age is reduced. To ensure maximum open
loop voltage, even with telephone line leak-
age, this occurs at a line current of approx-
imately 5 mA (references E in figure 13).
After the overhead voltage reduction, the
line voltage is kept nearly constant with a
steep slope corresponding to 2 25 (ref-
erence G in figure 13).
The open loop voltage, VTRMax, measured
between the TIPX and RINGX terminals is
tracking the battery voltage VBat (referenc-
es H in figure 13). VTRMax is programmable
by connecting the AOV-pin to AGND or by
leaving the AOV-pin open.
12

12 Page





SeitenGesamt 18 Seiten
PDF Download[ PBL386102QNT Schematic.PDF ]

Link teilen




Besondere Datenblatt

TeilenummerBeschreibungHersteller
PBL386102QNSSubscriber Line Interface CircuitEricsson
Ericsson
PBL386102QNTSubscriber Line Interface CircuitEricsson
Ericsson

TeilenummerBeschreibungHersteller
CD40175BC

Hex D-Type Flip-Flop / Quad D-Type Flip-Flop.

Fairchild Semiconductor
Fairchild Semiconductor
KTD1146

EPITAXIAL PLANAR NPN TRANSISTOR.

KEC
KEC


www.Datenblatt-PDF.com       |      2020       |      Kontakt     |      Suche