PBL385701SOT Datasheet PDF - Ericsson
| Part Number | PBL385701SOT | |
| Description | Universal Speech Circuit | |
| Manufacturers | Ericsson | |
| Logo |  |
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September 1997
PBL 385 70
Universal Speech Circuit
Description.
Key features.
PBL 38570 is a monolithic integrated speech transmission circuit for use in electronic • Minimum number of external
telephones. It is designed to accomodate either a low impedance dynamic or an electret
components, 7 capacitors and 11
microphone. A separate input for DTMF dialling tones that is controlled by a mute signal,
resistors.
and a signal summing point at the transmitter input, are available.
• Easy adaption to various market
An internally preset line length compensation can be adjusted with external resistors
needs.
to fit into different current feed systems as for ex. 48 V, 2 x 200 ohms, 48 V, 2 x 400 ohms • Mute control input for operation with
and 48 V, 2 x 800 ohms. The line length compensation can be shut off in either high or
DTMF - generator.
low gain mode. Application dependent parameters such as line balance, side tone level, • A separate input for DTMF tones
transmitter and receiver gains and frequency responces are set independently by
controlled by mute.
external components which means an easy adaption to various market needs.
• Transmitter and receiver gain
The setting of the parameters if carried out in certain order will counteract the
regulation for automatic loop loss
interaction between the settings.
compensation.
A number of different DC - supplies are provided to feed microphones and diallers. • Extended current and voltage range
5 - 130 mA, down to 2 V.
• Differential microphone input for
good balance to ground.
• Balanced receiver output stage.
• Stabilized DC - supplies for low
current CMOS diallers and electret
microphones.
• 18 - pin DIP and 20 - pin SO packa-
ges.
• Short start up time.
• Excellent RFI performance.
DTMF
input
Mic.
Mute
(active low)
DC-output for
external devices
10
AD
12
13 AM
DC-supply
89 7
6
Sense input
1
PBL 385 70
AT AR
17
18
5 11 3
2
15 16 14 + 4
5 Gain
regulation
+
43
2
1
+
Telephone
line
1. Line impedance and radio interference suppression.
2. Transmit gain and frequency response network.
3. Receive gain and frequency response network.
4. Side tone balance network.
5. DC-supply components.
Figure 1. Functional diagram. DIP package.
20-pin plastic SO
18-pin plastic DIP
1
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PBL 385 70
Functional description
Design procedure; ref. to fig.4.
The design is made easier through that all settable parameters are returned to ground (-line) this feature differs it from bridge
type solutions. To set the parameters in the following order will result in that the interaction between the same is minimized.
1. Set the circuit impedance to the line, either 600Ω or complex. (R3 and C1). C1 should be big enough to give low
impedance compared with R3 in the telephone speech frequency band. Too large C1 will make the start-up slow.
See fig. 6.
2. Set the DC-characteristic that is required in the PTT specification or in case of a system telephone in the PBX
specification (R6). There are also internal circuit dependent requirements like supply voltages etc.
3. Set the attac point where the line length regulation is supposed to cut in (R1 and R2). Note that in some countries
the line length regulation is not allowed. In most cases the endresult is better and more readily achieved by using
the line length regulation (line loss compensation) than without. See fig. 12.
4. Set the transmitter gain and frequency response.
5. Set the receiver gain and frequency response. See text how to limit the max. swing to the earphone.
6. Adjust the side tone balancing network.
7. Set the RFI suppression components in case necessary. In two piece telephones the often ”helically”
wound cord acts as an aerial. The microphone input with its high gain is especially sensitive.
8. Circuit protection. Apart from any other protection devices used in the design a good practice is to connect a 15V 1W
zener diode across the circuit , from pin 1 to -Line.
Impedance to the line
The AC- impedance to the line is set by
R3, C1 and C2. Fig.4. The circuits relatively
high parallel impedance will not influence
it to any noticeable extent. At low
frequencies the influence of C1 can not be
neglected. Series resistance of C1 that is
dependent on temperature and quality will
cause some of the line signal to enter pin
4. This generates a closed loop in the
transmitter amplifier that will create an
active impedance thus lowering the
impedance to the line. The impedance at
high frequencies is set by C2 that also
acts as a RFI suppressor.
In many specifications the impedance
towards the line is specified as a complex
network. See fig. 6. In case a). the error
signal entering pin 4 is set by the ratio ≈Rs/
R19 (909Ω), where in case b). the ratio at
high frequencies will be Rs/220Ω because
the 820Ω resistor is bypassed by a
capacitor. To help up this situation the
complex network capacitor is connected
directly to ground (-line), case c). making
the ratio Rs/220Ω+820Ω and thus less-
ening the error signal. Conclusion: Connect
like in case c) when complex impedance
is specified.
PBL 385 70
3
C2
Figure 6. AC-impedence
1
4
2
R6
+Line
a) b)
R3
c)
Rs
≈1Ω
+
C1
Example:
How to connect a
complex network.
-Line
5
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