Datenblatt-pdf.com


R4430PCP10MCM Schematic ( PDF Datasheet ) - Aeroflex Circuit Technology

Teilenummer R4430PCP10MCM
Beschreibung A MIPS R4400 RISC Microprocessor Multichip Module
Hersteller Aeroflex Circuit Technology
Logo Aeroflex Circuit Technology Logo 




Gesamt 11 Seiten
R4430PCP10MCM Datasheet, Funktion
The Aeroflex “RISC TurboEngine”©
A MIPS© R4400 RISC Microprocessor Multichip
Module
(Preliminary Data Sheet, use with “MIPS R4000 Microprocessor Users Manual”© MIPS 1993)
Aeroflex Circuit Technology
35 South Service Road, Plainview NY 11803
Tel:(516) 694-6700, Fax:(516) 694-6715
1.0 Description
The Aeroflex Circuit Technology “RISC TurboEngine” is a full military temperature range 64 bit, super-
pipelined RISC microprocessor with 1M Byte of secondary cache memory packaged in a high speed
multichip module (MCM). The module contains the following components:
(1) R4400SC/MC, a 3.3V powered RISC microprocessor.
(11) SRAMs, 64K by 16.
(3) Buffers and (3) Passive components for phase lock loop operation.
A Primary cache only version, the R4400PC is also available in the same package or 179 pin PGA
2.0 Flat Package Outline
“F10” Package
Pin 226
Pin 227
2.525 MAX
85 Spaces at 0.025
Pin 141
Pin 140
53 Spaces
at 0.025
Pin 280
Pin 1
.072 ±.01
R4400PC/SC
MCM
1.768
MAX
.010
Pin 87
Pin 86
.175 MAX
.006
Note: Outside ceramic tie
bars not shown for clarity.
Contact factory for details
SCD4430 Rev A 11/18/96
1






R4430PCP10MCM Datasheet, Funktion
Clock/Control Interface Signals
TClock(1:0)
O Transmit clocks : Two identical transmit clocks that
establish the system interface frequency
RClock(1:0)
O Receive clocks: Two identical receive clocks that estab-
lish the system interface frequency
MasterClock
I Master clock: Master clock input establishes the pro-
cessor operating frequency
Masterout
O Master clock out: Master clock output aligned with
MasterClock
SyncOut
O Synchronization clock out: Synchronization clock out-
put must be connected to SyncIn through an intercon-
nect that models the interconnect between MasterOut,
TClock, RClock, and the external agent.
SyncIn
I Synchronization clock in: Synchronization clock input
IOOut
O I/O output: Output slew rate control feedback loop out-
put. Must be connected to IOIn through a delay loop
that models the I/O path from the processor to an
external agent.
IOIn
I I/O input: Output slew rate control feedback loop input
(see IOOut)
Fault*
O Fault: The processor asserts Fault to indicate a mis-
match output of boundry comparators
VccP
I Quiet Vcc for the PLL: Quiet Vcc for the internal phase
lock loop
VssP
I Quiet Vss for the PLL: Quiet Vss for the internal phase
lock loop
Status(7:0)
O Status: An 8 bit bus that indicates the current operation
status of the processor
VccSense
I/O Vcc sense: This is a special pin used for testing and
characterization. The voltage at this pin directly shows
the behavior of the on chip Vcc.
VssSense
I/O Vss sense: VssSense provides a separate, direct connec-
tion fron the on-chip Vss node to a package pin without
attaching to the in-package ground planes. VssSence
should be connected to Vss in functional system
designs.
SCD4430 Rev A 11/18/96
6

6 Page







SeitenGesamt 11 Seiten
PDF Download[ R4430PCP10MCM Schematic.PDF ]

Link teilen




Besondere Datenblatt

TeilenummerBeschreibungHersteller
R4430PCP10MCMA MIPS R4400 RISC Microprocessor Multichip ModuleAeroflex Circuit Technology
Aeroflex Circuit Technology

TeilenummerBeschreibungHersteller
CD40175BC

Hex D-Type Flip-Flop / Quad D-Type Flip-Flop.

Fairchild Semiconductor
Fairchild Semiconductor
KTD1146

EPITAXIAL PLANAR NPN TRANSISTOR.

KEC
KEC


www.Datenblatt-PDF.com       |      2020       |      Kontakt     |      Suche