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RF2173 Schematic ( PDF Datasheet ) - RF Micro Devices

Teilenummer RF2173
Beschreibung 3V GSM POWER AMPLIFIER
Hersteller RF Micro Devices
Logo RF Micro Devices Logo 




Gesamt 14 Seiten
RF2173 Datasheet, Funktion
www.DataSheet4U.com
RF2173
0 3V GSM POWER AMPLIFIER
RoHS Compliant & Pb-Free Product
Typical Applications
• 3V GSM Cellular Handsets
• Commercial and Consumer Systems
• 3V Dual-Band/Triple-Band Handsets
• GPRS Compatible
• Portable Battery-Powered Equipment
Product Description
The RF2173 is a high power, high efficiency power ampli-
fier module offering high performance in GSM or GPRS
applications. The device is manufactured on an advanced
GaAs HBT process, and has been designed for use as
the final RF amplifier in GSM hand-held digital cellular
equipment and other applications in the 800MHz to
950MHz band. On-board power control provides over
70dB of control range with an analog voltage input, and
provides power down with a logic “low” for standby opera-
tion. The device is self-contained with 50Ω input and the
output can be easily matched to obtain optimum power
and efficiency characteristics. The RF2173 can be used
together with the RF2174 for dual-band operation. The
device is packaged in an ultra-small plastic package, min-
imizing the required board space.
3.75
0.10 C A
2 PLCS
12°
MAX
3.75
0.10 C B
2 PLCS
-B-
0.80
TYP
1.50
SQ.
0.75
0.50
INDEX AREA
Dimensions in mm.
0.45
0.28
Shaded pin is lead 1.
4.00
0.10 C B
2 PLCS
2.00
A
2 1.60
2 PLCS
4.00
3.20
2 PLCS
2.00
0.10 C A
2 PLCS
0.10 M C A B
0.05
0.00
1.00
0.90
0.75
0.65
C
0.05
Optimum Technology Matching® Applied
Si BJT
9GaAs HBT
GaAs MESFET
Si Bi-CMOS
SiGe HBT
Si CMOS
InGaP/HBT
GaN HEMT
SiGe Bi-CMOS
1 16 15 14 13
GND2 2
12 RF OUT
RF IN 3
11 RF OUT
GND1 4
10 RF OUT
56789
Package Style: QFN, 16-Pin, 4x4
Features
• Single 2.7V to 4.8V Supply Voltage
• +36dBm Output Power at 3.5V
• 32dB Gain with Analog Gain Control
• 56% Efficiency
• 800MHz to 950MHz Operation
• Supports GSM and E-GSM
Ordering Information
RF2173
3V GSM Power Amplifier
RF2173PCBA-41X Fully Assembled Evaluation Board
Functional Block Diagram
RF Micro Devices, Inc.
7628 Thorndike Road
Greensboro, NC 27409, USA
Tel (336) 664 1233
Fax (336) 664 0454
http://www.rfmd.com
Rev A7 060921
2-265






RF2173 Datasheet, Funktion
RF2173
Application Schematic
VCC
1 nF
120 pF
Very close to pin 15/16
.040"
RF IN
180 Ω
1 nF
0.9 pF
Instead of a stripline,
an inductor of ~10 nH
can be used
1 16 15 14 13
2 12
3 11
4 10
Quarter wave
length
VCC
33 pF
Instead of a stripline,
an inductor of 2.7 nH
can be used
50 Ω μstrip
33 pF
RF OUT
9 pF
14 pF
6.2 pF
56 7 89
VCC
Spacing between
edge of device and
capacitor 0.062"
Distance center to
center of capacitors
0.416"
VCC 10 nH
33 pF
33 pF
33 pF
33 pF
APC
Note: All capacitors are standard 0402 multi layer
2-270
Rev A7 060921

6 Page









RF2173 pdf, datenblatt
RF2173
PCB Solder Mask Pattern
Liquid Photo-Imageable (LPI) solder mask is recommended. The solder mask footprint will match what is shown for the
PCB Metal Land Pattern with a 3mil expansion to accommodate solder mask registration clearance around all pads. The
center-grounding pad shall also have a solder mask clearance. Expansion of the pads to create solder mask clearance
can be provided in the master data or requested from the PCB fabrication supplier.
A = 0.71 x 1.09 (mm) Typ.
B = 1.09 x 0.71 (mm) Typ.
C = 1.73 (mm) Sq.
3.20 (mm) Typ.
0.81 (mm)
Typ.
Pin 1
AA AA A
1.73 (mm)
Typ.
B
B
0.81 (mm) Typ.
0.81 (mm) Typ.
B CB
1.60 (mm)
0.94 (mm) Typ.
B
AA
AA
B
A
1.60 (mm)
Typ.
1.73 (mm)
Typ.
Figure 2. PCB Solder Mask Pattern (Top View)
Thermal Pad and Via Design
The PCB land pattern has been designed with a thermal pad that matches the exposed die paddle size on the bottom of
the device.
Thermal vias are required in the PCB layout to effectively conduct heat away from the package. The via pattern shown
has been designed to address thermal, power dissipation and electrical requirements of the device as well as accommo-
dating routing strategies.
The via pattern used for the RFMD qualification is based on thru-hole vias with 0.203mm to 0.330mm finished hole size
on a 0.5mm to 1.2mm grid pattern with 0.025mm plating on via walls. If micro vias are used in a design, it is suggested
that the quantity of vias be increased by a 4:1 ratio to achieve similar results.
Figure 3. shows the via pattern used for the RFMD qualification design.
2-276
Rev A7 060921

12 Page





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