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RF1K49223 Schematic ( PDF Datasheet ) - Intersil Corporation

Teilenummer RF1K49223
Beschreibung 2.5A/ 30V/ 0.150 Ohm/ Dual P-Channel LittleFET Power MOSFET
Hersteller Intersil Corporation
Logo Intersil Corporation Logo 




Gesamt 8 Seiten
RF1K49223 Datasheet, Funktion
Data Sheet
RF1K49223
August 1999 File Number 4322.1
2.5A, 30V, 0.150 Ohm, Dual P-Channel
LittleFET™ Power MOSFET
The RF1K49223 Dual P-Channel power MOSFET is
manufactured using an advanced MegaFET process. This
process, which uses feature sizes approaching those of LSI
integrated circuits, gives optimum utilization of silicon,
resulting in outstanding performance. It is designed for use
in applications such as switching regulators, switching
converters, motor drivers, relay drivers, and low voltage bus
switches. This device can be operated directly from
integrated circuits.
Formerly developmental type TA49223.
Ordering Information
PART NUMBER
PACKAGE
BRAND
RF1K49223
MS-012AA
RF1K49223
NOTE: When ordering, use the entire part number. For ordering in
tape and reel, add the suffix 96 to the part number, i.e. RF1K4922396.
Features
• 2.5A, 30V
• rDS(ON) = 0.150
• Temperature Compensating PSPICE® Model
• Thermal Impedance PSPICE Model
• Peak Current vs Pulse Width Curve
• UIS Rating Curve
• Related Literature
- TB334 “Guidelines for Soldering Surface Mount
Components to PC Boards”
Symbol
S1(1)
G1(2)
D1(8)
D1(7)
S2(3)
G2(4)
D2(6)
D2(5)
Packaging
JEDEC MS-012AA
BRANDING DASH
1
2
3
4
5
8-161
CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.
LittleFET™ is a trademark of Intersil Corporation. PSPICE® is a registered trademark of MicroSim Corporation.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999






RF1K49223 Datasheet, Funktion
RF1K49223
Test Circuits and Waveforms (Continued)
VGS
VGS
RGS
RL
VDS
DUT
-
VDD
+
FIGURE 17. SWITCHING TIME TEST CIRCUIT
tON
td(ON)
tr
0
10%
tOFF
td(OFF)
tf
10%
VDS
VGS
0
90%
10%
50%
PULSE WIDTH
90%
50%
90%
FIGURE 18. RESISTIVE SWITCHING WAVEFORMS
VGS
VDS
RL
DUT
-
VDD
+
FIGURE 19. GATE CHARGE TEST CIRCUIT
Soldering Precautions
The soldering process creates a considerable thermal stress
on any semiconductor component. The melting temperature
of solder is higher than the maximum rated temperature of
the device. The amount of time the device is heated to a high
temperature should be minimized to assure device reliability.
Therefore, the following precautions should always be
observed in order to minimize the thermal stress to which
the devices are subjected.
1. Always preheat the device.
2. The delta temperature between the preheat and solder-
ing should always be less than 100oC. Failure to preheat
the device can result in excessive thermal stress which
can damage the device.
3. The maximum temperature gradient should be less than
5oC per second when changing from preheating to sol-
dering.
Qg(TH)
0
VDS
VGS = -2V
-VGS
VDD
Qg(-10)
VGS = -10V
VGS = -20V
0
Ig(REF)
Qg(TOT)
FIGURE 20. GATE CHARGE WAVEFORMS
4. The peak temperature in the soldering process should be
at least 30oC higher than the melting point of the solder
chosen.
5. The maximum soldering temperature and time must not
exceed 260oC for 10 seconds on the leads and case of
the device.
6. After soldering is complete, the device should be allowed
to cool naturally for at least three minutes, as forced cool-
ing will increase the temperature gradient and may result
in latent failure due to mechanical stress.
7. During cooling, mechanical stress or shock should be
avoided.
8-166

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