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REG103 Schematic ( PDF Datasheet ) - Burr-Brown Corporation

Teilenummer REG103
Beschreibung DMOS 500mA Low Dropout Regulator
Hersteller Burr-Brown Corporation
Logo Burr-Brown Corporation Logo 




Gesamt 13 Seiten
REG103 Datasheet, Funktion
®
For most current data sheet and other product
information, visit www.burr-brown.com
REG103
REG103
REG103
REG103
DMOS
500mA Low Dropout Regulator
FEATURES
q NEW DMOS TOPOLOGY:
Ultra Low Dropout Voltage:
115mV typ at 500mA and 3.3V Output
Output capacitor NOT required for stability
q FAST TRANSIENT RESPONSE
q VERY LOW NOISE: 33µVrms
q HIGH ACCURACY: ±2% max
q HIGH EFFICIENCY:
IGND = 1mA at IOUT = 500mA
Not Enabled: IGND = 0.5µA
q 2.5V, 2.7V, 3.0V, 3.3V, 5.0V AND
ADJUSTABLE OUTPUT VERSIONS
q FOLDBACK CURRENT LIMIT
q THERMAL PROTECTION
q OUTPUT VOLTAGE ERROR INDICATOR(1)
q SMALL SURFACE-MOUNT PACKAGES:
SOT223-5, DDPAK-5, SO-8
APPLICATIONS
q PORTABLE COMMUNICATION DEVICES
q BATTERY-POWERED EQUIPMENT
q PERSONAL DIGITAL ASSISTANTS
q MODEMS
q BAR-CODE SCANNERS
q BACKUP POWER SUPPLIES
DESCRIPTION
The REG103 is a family of low noise, low dropout
linear regulators with low ground pin current. Its new
DMOS topology provides significant improvement
over previous designs, including low dropout voltage
(only 115mV typ at full load), and better transient
performance. In addition, no output capacitor is re-
quired for stability, unlike conventional low dropout
regulators that are difficult to compensate and require
expensive low ESR capacitors greater than 1µF.
Typical ground pin current is only 1mA (at IOUT =
500mA) and drops to 0.5µA in “not enabled” mode.
Unlike regulators with PNP pass devices, quiescent
current remains relatively constant over load varia-
tions and under dropout conditions.
The REG103 has very low output noise (typically
33µVrms for VOUT = 3.3V with CNR = 0.01µF),
making it ideal for use in portable communications
equipment. On-chip trimming results in high output
voltage accuracy. Accuracy is maintained over tem-
perature, line, and load variations. Key parameters are
guaranteed over the specified temperature range
(–40°C to +85°C).
The SO-8 version of the REG103 has an Error pin
which provides a “power good” flag indicating the
regulator is in regulation. The REG103 is well pro-
tected: internal circuitry provides a current limit which
protects the load from damage. Thermal protection
circuitry keeps the chip from being damaged by exces-
sive temperature. In addition to the SO-8 package, the
REG103 is also available in the DDPAK and the
SOT223-5.
Enable Error(1)
Enable Error(1)
VIN
+
0.1µF
REG103
(Fixed Voltage
Versions)
NR Gnd
NR = Noise Reduction
VOUT
+ COUT(2)
VIN
+
0.1µF
NOTE: (1) SO-8 Package Only. (2) Optional.
REG103-A
Gnd
R1 +
Adj
VOUT
COUT(2)
R2
International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111
Twx: 910-952-1111 • Internet: http://www.burr-brown.com/ • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132
©2000 Burr-Brown Corporation
PDS-11527C
REPriGnte1d i0n U3.S.A. July, 2000
®






REG103 Datasheet, Funktion
TYPICAL PERFORMANCE CURVES (Cont.)
For all models, at TJ = +25°C and VENABLE = 2V, unless otherwise noted.
LOAD TRANSIENT RESPONSE
REG103-3.3
VIN = 4.3V
COUT = 0
500mA
10mA
COUT = 10µF
10µs/div
VOUT
VOUT
IOUT
6V
5V
LINE TRANSIENT RESPONSE
COUT = 0
REG103-3.3
Load = 100mA
VOUT
COUT = 10µF
50µs/div
VOUT
VIN
LOAD TRANSIENT RESPONSE
REG103-Adj.
VOUT = 3.3V, VIN = 4.3V, CFB = 0.01µF
COUT = 0
VOUT
500mA
10mA
COUT = 10µF
VOUT
10µs/div
IOUT
LINE TRANSIENT RESPONSE
REG103-Adj.
VOUT = 3.3V, CFB = 0.01µF, IOUT = 100mA
COUT = 0
VOUT
COUT = 10µF
VOUT
6V VIN
5V
50µs/div
LOAD REGULATION vs TEMPERATURE
(VIN = VOUT + 1V and 10mA < IOUT < 500mA)
0.5
0.4
0.3
0.2
0.1
0
–75 –50 –25
0 25 50
Temperature (°C)
75 100 125
OUTPUT NOISE DENSITY
10
1
0.1
0.01
10
CNR = 0
COUT = 0
CNR = 0.01µF
COUT = 10µF
100
1000
10000
Frequency (Hz)
100,000
®
REG103
6

6 Page









REG103 pdf, datenblatt
the available “headroom” VIN to VOUT voltage drop. Under
worst-case conditions (full-scale load change with VIN to
VOUT voltage drop close to DC dropout levels), the REG103
can take several hundred microseconds to re-enter the speci-
fied window of regulation.
TRANSIENT RESPONSE
The REG103 response to transient line and load conditions
improves at lower output voltages. The addition of a capaci-
tor (nominal value 10nF) from the output pin to ground may
improve the transient response. In the adjustable version, the
addition of a capacitor, CFB (nominal value 10nF), from the
output to the adjust pin will also improve the transient
response.
heat from the device. In those examples where there is
copper on both sides of the PCB, no connection has been
provided between the two sides. The addition of plated
through holes will improve the heat sink effectiveness.
Power dissipation depends on input voltage and load condi-
tions. Power dissipation is equal to the product of the
average output current times the voltage across the output
element, VIN to VOUT voltage drop.
PD = (VIN – VOUT ) IOUT (AVG)
Power dissipation can be minimized by using the lowest
possible input voltage necessary to assure the required
output voltage.
THERMAL PROTECTION
Power dissipated within the REG103 will cause the junction
temperature to rise. The REG103 has thermal shutdown
circuitry that protects the regulator from damage. The ther-
mal protection circuitry disables the output when the junc-
tion temperature reaches approximately 150°C, allowing the
device to cool. When the junction temperature cools to
approximately 130°C, the output circuitry is again enabled.
Depending on various conditions, the thermal protection
circuit may cycle on and off. This limits the dissipation of
the regulator, but may have an undesirable effect on the load.
Any tendency to activate the thermal protection circuit
indicates excessive power dissipation or an inadequate heat
sink. For reliable operation, junction temperature should be
limited to 125°C, maximum. To estimate the margin of
safety in a complete design (including heat sink), increase
the ambient temperature until the thermal protection is
triggered. Use worst-case loads and signal conditions. For
good reliability, thermal protection should trigger more than
35°C above the maximum expected ambient condition of
your application. This produces a worst-case junction tem-
perature of 125°C at the highest expected ambient tempera-
ture and worst-case load.
The internal protection circuitry of the REG103 has been
designed to protect against overload conditions. It was not
intended to replace proper heat sinking. Continuously run-
ning the REG103 into thermal shutdown will degrade reli-
ability.
REGULATOR MOUNTING
The tab of both packages is electrically connected to ground.
For best thermal performance, the tab of the DDPAK sur-
face-mount version should be soldered directly to a circuit-
board copper area. Increasing the copper area improves heat
dissipation. Figure 12 shows typical thermal resistance from
junction to ambient as a function of the copper area for the
DDPAK.
Although the tabs of the DDPAK and the SOT-223 are
electrically ground, they are not intended to carry any
current. The copper pad that acts as a heat sink should be
isolated from the rest of the circuit to prevent current flow
through the device from the tab to the ground pin. Solder pad
footprint recommendations for the various REG103 devices
are presented in Application Bulletin “Solder Pad Recom-
mendations for Surface-Mount Devices” (AB-132), avail-
able from the Burr-Brown web site (www.burr-brown.com).
6
CONDITIONS
5 #1
#2
#3
4 #4
#5
3
2
POWER DISSIPATION
1
The REG103 is available in three different package configu-
rations. The ability to remove heat from the die is different
for each package type and, therefore, presents different
0
0 25 50 75 100 125 150
Ambient Temperature (°C)
considerations in the printed circuit-board layout. The PCB
area around the device that is free of other components
moves the heat from the device to the ambient air. While it
is difficult-to-impossible to quantify all of the variables in a
thermal design of this type, performance data for several
CONDITION
1
2
3
4
PACKAGE
DDPAK
SOT-223
DDPAK
SOT-223
PCB AREA
4in2 Top Side Only
4in2 Top Side Only
None
0.5in2 Top Side Only
THETA J-A
27°C/W
53°C/W
65°C/W
110°C/W
configurations are shown in Figure 11. In all cases the PCB
5 SO-8
None 150°C/W
copper area is bare copper, free of solder resist mask, and not
solder plated. All examples are for 1-ounce copper. Using FIGURE 11. Maximum Power Dissipation versus Ambient
heavier copper will increase the effectiveness in moving the
Temperature for the Various Packages and
PCB Heat Sink Configurations.
®
REG103
12

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