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RFT1P06E Schematic ( PDF Datasheet ) - Intersil Corporation

Teilenummer RFT1P06E
Beschreibung 1.4A/ 60V/ 0.285 Ohm/ ESD Rated/ P-Channel Power MOSFET
Hersteller Intersil Corporation
Logo Intersil Corporation Logo 




Gesamt 8 Seiten
RFT1P06E Datasheet, Funktion
Data Sheet
RFT1P06E
August 1999 File Number 4495.1
1.4A, 60V, 0.285 Ohm, ESD Rated,
P-Channel Power MOSFET
These products are P-Channel power MOSFETs
manufactured using the MegaFET process. This process,
which uses feature sizes approaching those of LSI circuits,
gives optimum utilization of silicon, resulting in outstanding
performance. They were designed for use in applications
such as switching regulators, switching converters, motor
drivers, and relay drivers. These transistors can be operated
directly from integrated circuits.
Formerly developmental type TA49044.
Ordering Information
PART NUMBER
PACKAGE
BRAND
RFT1P06E
SOT-223
R1P06E
NOTE: RFT1P06E is available only in tape and reel.
Features
• 1.4A, 60V
• rDS(ON) = 0.285
• 2kV ESD Protected
• Temperature Compensating PSPICE® Model
• SPICE Thermal Model
• Peak Current vs Pulse Width Curve
• UIS Rating Curve
• 150oC Operating Temperature
• Related Literature
- TB334, “Guidelines for Soldering Surface Mount
Components to PC Boards”
Symbol
D
G
S
Packaging
DRAIN
(FLANGE)
SOT-223
SOURCE
DRAIN
GATE
4-171
CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.
PSPICE® is a registered trademark of MicroSim Corporation.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999.






RFT1P06E Datasheet, Funktion
RFT1P06E
Test Circuits and Waveforms (Continued)
0V
-VGS
VGS
RGS
RL
VDS
-
+
DUT
tON
td(ON)
tr
0
10%
VDS
90%
0
10%
VGS
50%
PULSE WIDTH
tOFF
td(OFF)
tf
10%
90%
50%
90%
FIGURE 18. SWITCHING TIME TEST CIRCUIT
Thermal Resistance vs Mounting Pad Area
The maximum rated junction temperature, TJ(MAX), and the
thermal resistance of the heat dissipating path determines
the maximum allowable device power dissipation, PD(MAX),
in an application. Therefore the application’s ambient
temperature, TA (oC), and thermal impedance RθJA (oC/W)
must be reviewed to ensure that TJ(MAX) (oC) is never
exceeded. Equation 1 mathematically represents the
relationship and serves as the basis for establishing the
rating of the part.
PDMAX = -(--T----J---M--R----A--θ--X-J----A-–----T----A-----)
(EQ. 1)
In using surface mount devices such as the SOT-223
package, the environment in which it is applied will have a
significant influence on the part’s current and maximum
power dissipation ratings. Precise determination of the
PD(MAX) is complex and influenced by many factors:
1. Mounting pad area onto which the device is attached and
whether there is copper on one side or both sides of the
board.
2. The number of copper layers and the thickness of the
board.
3. The use of external heat sinks.
4. The use of thermal vias.
5. Air flow and board orientation.
6. For non steady state applications, the pulse width, the
duty cycle and the transient thermal response of the part,
the board and the environment they are in.
Intersil provides thermal information to assist the designer’s
preliminary application evaluation. Figure 20 defines the
RθJA for the device as a function of the top copper
(component side) area. This is for a horizontally positioned
FR-4 board with 1oz copper after 1000 seconds of steady
FIGURE 19. RESISTIVE SWITCHING WAVEFORMS
state power with no air flow. This graph provides the
necessary information for calculation of the steady state
junction temperature or power dissipation. Pulse
applications can be evaluated using the Intersil device Spice
thermal model or manually utilizing the normalized maximum
transient thermal impedance curve.
200
RθJA = 73.0 - 17.4 * ln(AREA)
150 137oC/W - 0.026in2
119oC/W - 0.071in2
100
110oC/W - 0.122in2
50
0.01
0.1
AREA, TOP COPPER AREA (in2)
1.0
FIGURE 20. THERMAL RESISTANCE vs MOUNTING PAD AREA
Displayed on the curve are the three RθJA values listed in
the Electrical Specifications table. The three points where
chosen to depict the compromise between the copper board
area, the thermal resistance and ultimately the power
dissipation, PD(MAX). Thermal resistances corresponding to
other component side copper areas can be obtained from
Figure 20 or by calculation using Equation 2. The area, in
square inches is the top copper area including the gate and
source pads.
RθJA = 73.0 17.4 × ln (Area)
(EQ. 2)
4-176

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