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PDF RFRXD0420 Data sheet ( Hoja de datos )
| Número de pieza | RFRXD0420 | |
| Descripción | UHF ASK/FSK/FM Receiver | |
| Fabricantes | Microchip Technology | |
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rfRXD0420/0920
UHF ASK/FSK/FM Receiver
Features:
• Low cost single conversion superheterodyne
receiver architecture
• Compatible with rfPIC™ and rfHCS series of RF
transmitters
• Easy interface to PICmicro® microcontroller
(MCU) and KEELOQ® decoders
• VCO phase locked to quartz crystal reference:
- Narrow receiver bandwidth
- Maximizes range and interference immunity
• Selectable LNA gain control for improved dynamic
range
• Selectable IF bandwidth via external ceramic IF
filter
• Received Signal Strength Indicator (RSSI) for
signal strength indication (FSK, FM) and ASK
demodulation
• FSK/FM quadrature (phase coincidence) detector
demodulator
• 32-Lead LQFP package
UHF ASK/FSK Receiver:
• Single frequency receiver set by crystal frequency
• Receive frequency range:
Device
Frequency Range
rfRXD0420
300 MHz to 450 MHz
rfRXD0920
800 MHz to 930 MHz
• Maximum data rate:
- ASK: 80 Kbps NRZ
- FSK: 40 Kbps NRZ
• IF frequency range: 455 kHz to 21.4 MHz
• RSSI range: 70 dB
• Frequency deviation range: ±5 kHz to ±120 kHz
• Maximum FM modulation frequency: 15 kHz
Pin Diagram:
LQFP
VSS
LNAGAIN
LNAOUT
1IFIN
VSS
1IF+
1IF-
VDD
1 24
2 23
3
4
rfRXD0420
22
21
5 rfRXD0920 20
6 19
7 18
8 17
DEMOUT-
DEMOUT+
VSS
RSSI
OPA+
OPA-
OPA
VDD
Applications:
• Wireless remote command and control
• Wireless security systems
• Remote Keyless Entry (RKE)
• Low power telemetry
• Low power FM receiver
• Home automation
• Remote sensing
Bi-CMOS Technology:
• Wide operating voltage range
• Low current consumption in Active and Standby
modes
- rfRXD0420
- 8.2 mA (typical, LNA High Gain mode)
- <100 nA standby
- rfRXD0920
- 9.2 mA (typical, LNA High Gain mode)
- <100 nA standby
• Wide temperature range:
- Industrial: -40°C to +85°C
2003 Microchip Technology Inc.
Preliminary
DS70090A-page 1
1 page  
2.0 CIRCUIT DESCRIPTION
This section gives a circuit description of the internal
circuitry of the rfRXD0420/0920 receiver. External
connections and components are given in the
APPLICATION CIRCUITS section.
2.1 Bias Circuitry
Bias circuitry provides bandgap biasing and circuit
shutdown capabilities. The ENRX (Pin 28) modes are
summarized in Table 2-1. The ENRX pin is a CMOS
compatible input and is internally pulled down to Vss.
TABLE 2-1: BIAS CIRCUITRY CONTROL
ENRX(1)
Description
0 Standby mode
1 Receiver enabled
Note 1: ENRX has internal pull-down to Vss
2.2 Frequency Synthesizer
The Phase-locked Loop (PLL) frequency synthesizer
generates the Local Oscillator (LO) signal. It consists
of:
• Crystal oscillator
• Phase-frequency detector and charge pump
• Voltage Controlled Oscillator (VCO)
• Fixed feedback divider:
- rfRXD0420 = divide by 16
- rfRXD0920 = divide by 32
2.2.1 CRYSTAL OSCILLATOR
The internal crystal oscillator is a Colpitts type oscilla-
tor. It provides the reference frequency to the PLL. A
crystal is normally connected to the XTAL (Pin 26) and
ground. The internal capacitance of the crystal oscilla-
tor is 15 pF. Alternatively, a signal can be injected into
the XTAL pin from a signal source. The signal should
be AC coupled via a series capacitor at a level of
approximately 600 mVpp.
The XTAL pin is illustrated in Figure 2-1.
FIGURE 2-1:
BLOCK DIAGRAM OF
XTAL PIN
VDD
XTAL
26
VSS
VDD
VDD
50 kΩ
30 pF
30 pF 40 µA
VSS
VSS
rfRXD0420/0920
The PLL consists of a phase-frequency detector,
charge pump, voltage-controlled oscillator (VCO), and
fixed divide-by-16 (rfRXD0420) or divide-by-32
(rfRXD0920) divider. The rfRXD0420/0920 employs a
charge pump PLL that offers many advantages over
the classical voltage phase detector PLL: infinite pull-in
range and zero steady state phase error. The charge
pump PLL allows the use of passive loop filters that are
lower cost and minimize noise. Charge pump PLLs
have reduced flicker noise thus limiting phase noise.
An external loop filter is connected to pin LF (Pin 29).
The loop filter controls the dynamic behavior of the
PLL, primarily lock time and spur levels. The applica-
tion determines the loop filter requirements.
The VCO gain for the rfRXD0420/0920 receivers are
listed in Table 2-2.
TABLE 2-2: PLL PARAMETERS
Device
rfRXD0420
KVCO(1)
250 MHz/V at
433 MHz
ICP(1)
60 µA
rfRXD0920 300 MHz/V at 60 µA
868 MHz
Note 1: Typical value
Divider
16
32
The LF pin is illustrated in Figure 2-2.
FIGURE 2-2: BLOCK DIAGRAM OF LOOP
FILTER PIN
VDD
LF
29
VSS
200 Ω
400 Ω
4 pF
VSS
VSS
2.3 Low Noise Amplifier
The Low-Noise Amplifier (LNA) is a high-gain amplifier
whose primary purpose is to lower the overall noise
figure of the entire receiver thus enhancing the receiver
sensitivity. The LNA is an open-collector cascode
design. The benefits of a cascode design are:
• high gain with low noise
• high-frequency
• wide bandwidth
• low effective input capacitance with stable input
impedance
• high output resistance
• high reverse isolation that provides improved
stability and reduces LO leakage
2003 Microchip Technology Inc.
Preliminary
DS70090A-page 5
5 Page 
rfRXD0420/0920
3.1.3 PLL LOOP FILTER
An external PLL loop filter is connected to pin LF
(Pin 29). The loop filter controls the dynamic behavior
of the PLL, primarily lock time and spur levels. Gener-
ally, the PLL lock time is a small fraction of the overall
receiver start-up time (see Electrical Characteristics
Section). The crystal oscillator is the largest contributor
to start-up time. Thus, for the majority of applications,
design loop filter values for a wide loop bandwidth to
suppress noise. Figure 3-4 illustrates an example filter
circuit for a wide frequency range suitable for a majority
of applications.
FIGURE 3-4: PLL LOOP FILTER EXAMPLE
CIRCUIT
29
C2
OPTIONAL
C1
1000 pF
R1
10 kΩ
3.1.4 PRESELECTOR
Receiver performance is heavily influenced by the
preselector (also known as the front-end filter). The
purpose of the preselector is to filter unwanted signals
and noise from entering the receiver.
The most important unwanted signal is the image
frequency (frf-image). Pay particular attention to the
image frequency calculated in Figure 3-3 as this will be
the frequency that needs to be filtered out by the
preselector.
The preselector can be designed using a simple LC
filter or a Surface Acoustic Wave (SAW) filter. A simple
LC filter provides a low cost solution but will have the
least effect filtering the image frequency. A SAW filter
can effectively filter the image frequency with a
minimum of 40 dB attenuation.
The SAW filter has the added advantage of filtering
wide-band noise and improving the signal-to-noise
ratio (SNR) of the receiver.
SAW filters require impedance matching. Refer to the
manufacturers' data sheet and application notes for
SAW filter pinouts, specified impedances and recom-
mended matching circuits. Figure 3-5 shows a SAW
filter example circuit.
A secondary purpose of the preselector is to provide
impedance matching between the antenna and LNAIN
(Pin 31).
3.1.5 ANTENNA
Receiver performance and device packaging influence
antenna selection. There are many third-party anten-
nas to choose from. Third-party antennas typically
have an impedance of 50 Ω. The preselector compo-
nents should be chosen to match the impedance of the
antenna to the LNAIN (Pin 31) impedance of
26 Ω || 2 pF.
The designer can chose to use a simple wire antenna.
The length of the wire should be one-quarter the wave-
length (λ) of the receive frequency. For example, the
wavelength of 433.92 MHz is:
λ = c / frf where c = 3 x 108 m/s
λ = 3 x 108 m/s / 433.92 x 106 Hz
λ = 0.69 m
therefore
0.25λ = 17.3 cm or 6.8 inches
Finally, the wire antenna should be impedance
matched to the preselector. The typical impedance of a
one-quarter wavelength wire antenna is 36 Ω.
3.1.6 LNA GAIN
For a majority of applications, LNAGAIN can be tied to
Vss (ground) enabling High Gain mode. If the applica-
tion requires short range communications, LNAGAIN
can be tied to VDD (pulled up) enabling Low Gain mode.
More Information on LNAGAIN operation can be found
in the Circuit Description section.
FIGURE 3-5: SAW FILTER EXAMPLE CIRCUIT
Antenna
L1
C1
F1 SAW Filter
2 Input
Output 5
1 Input Gnd Output Gnd 6
Case Gnd
3478
L2
LNAIN
C2
Note: Refer to SAW filter manufacturer’s data sheet for pin outs
and values for impedance matching components.
2003 Microchip Technology Inc.
Preliminary
DS70090A-page 11
11 Page | ||
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| PDF Descargar | [ Datasheet RFRXD0420.PDF ] | |
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