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PDF RFD16N06LE Data sheet ( Hoja de datos )

Número de pieza RFD16N06LE
Descripción 16A/ 60V/ 0.047 Ohm/ Logic Level/ N-Channel Power MOSFETs
Fabricantes Intersil Corporation 
Logotipo Intersil Corporation Logotipo



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Data Sheet
RFD16N06LE, RFD16N06LESM
October 1999 File Number 3628.3
16A, 60V, 0.047 Ohm, Logic Level,
N-Channel Power MOSFETs
These are N-Channel power MOSFETs manufactured using
a modern process. This process, which uses feature sizes
approaching those of LSI integrated circuits gives optimum
utilization of silicon, resulting in outstanding performance.
They were designed for use in applications such as
switching regulators, switching converters, motor drivers,
relay drivers and emitter switches for bipolar transistors. This
performance is accomplished through a special gate oxide
design which provides full rated conductance at gate bias in
the 3V to 5V range, thereby facilitating true on-off power
control directly from logic level (5V) integrated circuits.
Formerly developmental type TA49027.
Ordering Information
PART NUMBER
PACKAGE
BRAND
RFD16N06LE
TO-251AA
16N06L
RFD16N06LESM TO-252AA
16N06LE
NOTE: When ordering, use the entire part number. Add suffix 9A to
obtain the TO-252AA variant in the tape and reel, i.e.,
RFD16N06LESM9A.
Packaging
JEDEC TO-251AA
DRAIN (FLANGE)
SOURCE
DRAIN
GATE
Features
• 16A, 60V
• rDS(ON) = 0.047
• Temperature Compensating PSPICE® Model
• Can be Driven Directly from CMOS, NMOS, TTL
Circuits
• Peak Current vs Pulse Width Curve
• UIS Rating Curve
• Related Literature
- TB334 “Guidelines for Soldering Surface Mount
Components to PC Boards”
Symbol
D
G
S
JEDEC TO-252AA
DRAIN (FLANGE)
GATE
SOURCE
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.
PSPICE® is a registered trademgark of MicroSim Corporation.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999

1 page




RFD16N06LE pdf
RFD16N06LE, RFD16N06LESM
Test Circuits and Waveforms
VARY tP TO OBTAIN
REQUIRED PEAK IAS
VGS
tP
0V
RG
VDS
L
DUT
+
VDD
-
IAS
0.01
FIGURE 13. UNCLAMPED ENERGY TEST CIRCUIT
tP
IAS
BVDSS
VDS
VDD
0
tAV
FIGURE 14. UNCLAMPED ENERGY WAVEFORMS
VGS
VGS
RGS
VDS
RL
DUT
+
VDD
-
FIGURE 15. SWITCHING TIME TEST CIRCUIT
VDS
RL
VGS
Ig(REF)
DUT
+
VDD
-
FIGURE 17. GATE CHARGE TEST CIRCUIT
5
VDS
tON
td(ON)
tr
90%
tOFF
td(OFF)
tf
90%
10%
VGS
10%
50%
PULSE WIDTH
10%
90%
50%
FIGURE 16. RESISTIVE SWITCHING WAVEFORMS
VDD
VGS
VGS = 2V
0
Qg(TOT)
VDS
Qg(10) OR Qg(5)
VGS = 20V
VGS = 10V FOR
L2 DEVICES
VGS = 1V FOR
L2 DEVICES
Qg(TH)
VGS = 10V
VGS = 5V FOR
L2 DEVICES
Ig(REF)
0
FIGURE 18. GATE CHARGE WAVEFORMS

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