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PA28F200BL-B150 Schematic ( PDF Datasheet ) - Intel Corporation

Teilenummer PA28F200BL-B150
Beschreibung 2-MBIT (128K x 16/ 256K x 8)LOW-POWER BOOT BLOCK FLASH MEMORY FAMILY
Hersteller Intel Corporation
Logo Intel Corporation Logo 




Gesamt 42 Seiten
PA28F200BL-B150 Datasheet, Funktion
2-MBIT (128K x 16 256K x 8)
LOW-POWER BOOT BLOCK
FLASH MEMORY FAMILY
28F200BL-T B 28F002BL-T B
Y Low Voltage Operation for Very Low
Power Portable Applications
VCC e 3 0V – 3 6V
Y Expanded Temperature Range
b20 C to a70 C
Y x8 x16 Input Output Architecture
28F200BL-T 28F200BL-B
For High Performance and High
Integration 16-bit and 32-bit CPUs
Y x8-only Input Output Architecture
28F002BL-T 28F002BL-B
For Space Constrained 8-bit
Applications
Y Upgradeable to Intel’s SmartVoltage
Products
Y Optimized High-Density Blocked
Architecture
One 16-KB Protected Boot Block
Two 8-KB Parameter Blocks
One 96-KB Main Block
One 128-KB Main Block
Top or Bottom Boot Locations
Y Extended Cycling Capability
10 000 Block Erase Cycles
Y Automated Word Byte Write and Block
Erase
Command User Interface
Status Registers
Erase Suspend Capability
Y SRAM-Compatible Write Interface
Y Automatic Power Savings Feature
0 8 mA Typical ICC Active Current in
Static Operation
Y Very High-Performance Read
150 ns Maximum Access Time
65 ns Maximum Output Enable Time
Y Low Power Consumption
15 mA Typical Active Read Current
Y Reset Deep Power-Down Input
0 2 mA ICC Typical
Acts as Reset for Boot Operations
Y Write Protection for Boot Block
Y Hardware Data Protection Feature
Erase Write Lockout during Power
Transitions
Y Industry Standard Surface Mount
Packaging
28F200BL JEDEC ROM Compatible
44-Lead PSOP
56-Lead TSOP
28F002BL 40-Lead TSOP
Y 12V Word Byte Write and Block Erase
VPP e 12V g5% Standard
Y ETOXTM III Flash Technology
3 3V Read
Y Independent Software Vendor Support
Other brands and names are the property of their respective owners
Information in this document is provided in connection with Intel products Intel assumes no liability whatsoever including infringement of any patent or
copyright for sale and use of Intel products except as provided in Intel’s Terms and Conditions of Sale for such products Intel retains the right to make
changes to these specifications at any time without notice Microcomputer Products may have minor variations to this specification known as errata
COPYRIGHT INTEL CORPORATION 1995
December 1995
Order Number 290449-006






PA28F200BL-B150 Datasheet, Funktion
28F200BL-T B 28F002BL-T B
1 4 Pinouts
The 28F200BL 44-Lead PSOP pinout follows the in-
dustry standard ROM EPROM pinout as shown in
Figure 3 with an upgrade to the 28F400BL
(4-Mbit low power flash family) Furthermore
the 28F200BL 56-Lead TSOP pinout shown in
Figure 4 provides density upgrades to the 28F400BL
and to future higher density boot block memories
The 28F002BL 40-Lead TSOP pinout shown in Fig-
ure 5 is 100% compatible and has a density up-
grade to the 28F004BL 4-Mbit Low Power Boot
Block flash memory
Figure 3 PSOP Lead Configuration for x8 x16 28F200BL
290449 – 24
6

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PA28F200BL-B150 pdf, datenblatt
28F200BL-T B 28F002BL-T B
2 1 28F200BL Memory Organization
2 1 1 BLOCKlNG
The 28F200BL uses a blocked array architecture to
provide independent erasure of memory blocks A
block is erased independently of other blocks in the
array when an address is given within the block ad-
dress range and the Erase Setup and Erase Confirm
commands are written to the CUI The 28F200BL is
a random read write memory only erasure is per-
formed by block
2 1 1 1 Boot Block Operation and Data
Protection
The 16-Kbyte boot block provides a lock feature for
secure code storage The intent of the boot block is
to provide a secure storage area for the kernel code
that is required to boot a system in the event of pow-
er failure or other disruption during code update
This lock feature ensures absolute data integrity by
preventing the boot block from being written or
erased when RP is not at 12V The boot block can
be erased and written when RP is held at 12V for
the duration of the erase or program operation This
allows customers to change the boot code when
necessary while providing security when needed
See the Block Memory Map section for address lo-
cations of the boot block for the 28F200BL-T and
28F200BL-B
2 1 1 3 Main Block Operation
Two main blocks of memory exist on the 28F200BL
(1 x 128-Kbyte block and 1 x 96-Kbyte blocks) See
the following section on Block Memory Map for the
address location of these blocks for the 28F200BL-T
and 28F200BL-B products
2 1 2 BLOCK MEMORY MAP
Two versions of the 28F200BL product exist to sup-
port two different memory maps of the array blocks
in order to accommodate different micropro- cessor
protocols for boot code location The 28F200BL-T
memory map is inverted from the 28F200BL-B mem-
ory map
2 1 2 1 28F200BL-B Memory Map
The 28F200BL-B device has the 16-Kbyte boot
block located from 00000H to 01FFFH to accom-
modate those microprocessors that boot from the
bottom of the address map at 00000H In the
28F200BL-B the first 8-Kbyte parameter block re-
sides in memory space from 02000H to 02FFFH
The second 8-Kbyte parameter block resides in
memory space from 03000H to 03FFFH The
96-Kbyte main block resides in memory space from
04000H to 0FFFFH The 128-Kbyte main block re-
sides in memory space from 10000H to 1FFFFH
(word locations) See Figure 7
2 1 1 2 Parameter Block Operation
The 28F200BL has 2 parameter blocks (8 Kbytes
each) The parameter blocks are intended to pro-
vide storage for frequently updated system parame-
ters and configuration or diagnostic information The
parameter blocks can also be used to store addition-
al boot or main code The parameter blocks howev-
er do not have the hardware write protection feature
that the boot block has The parameter blocks pro-
vide for more efficient memory utilization when deal-
ing with parameter changes versus regularly blocked
devices See the Block Memory Map section for ad-
dress locations of the parameter blocks for the
28F200BL-T and 28F200BL-B
(Word Addresses)
1FFFFH
128-Kbyte MAIN BLOCK
10000H
0FFFFH
04000H
03FFFH
03000H
02FFFH
02000H
01FFFH
00000H
96-Kbyte MAIN BLOCK
8-Kbyte PARAMETER BLOCK
8-Kbyte PARAMETER BLOCK
16-Kbyte BOOT BLOCK
Figure 7 28F200BL-B Memory Map
12

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