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P89LPC922FDH Schematic ( PDF Datasheet ) - NXP Semiconductors

Teilenummer P89LPC922FDH
Beschreibung 8-bit microcontrollers with two-clock 80C51 core 2 kB/4 kB/8 kB 3 V low-power Flash with 256-byte data RAM
Hersteller NXP Semiconductors
Logo NXP Semiconductors Logo 




Gesamt 30 Seiten
P89LPC922FDH Datasheet, Funktion
P89LPC920/921/922
8-bit microcontrollers with two-clock 80C51 core
2 kB/4 kB/8 kB 3 V low-power Flash with 256-byte data RAM
Rev. 06 — 21 November 2003
Product data
1. General description
The P89LPC920/921/922 are single-chip microcontrollers designed for applications
demanding high-integration, low cost solutions over a wide range of performance
requirements. The P89LPC920/921/922 is based on a high performance processor
architecture that executes instructions in two to four clocks, six times the rate of
standard 80C51 devices. Many system-level functions have been incorporated into
the P89LPC920/921/922 in order to reduce component count, board space, and
system cost.
2. Features
2.1 Principal features
s 2 kB/4 kB/8 kB Flash code memory with 1 kB erasable sectors, 64-byte erasable
page size, and single byte erase.
s 256-byte RAM data memory.
s Two 16-bit counter/timers. Each timer may be configured to toggle a port output
upon timer overflow or to become a PWM output.
s Real-Time clock that can also be used as a system timer.
s Two analog comparators with selectable inputs and reference source.
s Enhanced UART with fractional baud rate generator, break detect, framing error
detection, automatic address detection and versatile interrupt capabilities.
s 400 kHz byte-wide I2C-bus communication port.
s Configurable on-chip oscillator with frequency range and RC oscillator options
(selected by user programmed Flash configuration bits). The RC oscillator option
allows operation without external oscillator components. Oscillator options
support frequencies from 20 kHz to the maximum operating frequency of 12 MHz.
The RC oscillator option is selectable and fine tunable.
s 2.4 V to 3.6 V VDD operating range. I/O pins are 5 V tolerant (may be pulled up or
driven to 5.5 V).
s 15 I/O pins minimum. Up to 18 I/O pins while using on-chip oscillator and reset
options.
2.2 Additional features
s 20-pin TSSOP and DIP packages.
s A high performance 80C51 CPU provides instruction cycle times of 167 ns to
333 ns for all instructions except multiply and divide when executing at 12 MHz.
This is 6 times the performance of the standard 80C51 running at the same clock
frequency. A lower clock frequency for the same performance results in power
savings and reduced EMI.






P89LPC922FDH Datasheet, Funktion
Philips Semiconductors
P89LPC920/921/922
8-bit microcontrollers with two-clock 80C51 core
5.2 Pin description
Table 3: Pin description
Symbol
Pin
Type
P0.0 - P0.7
1, 20, 19, I/O
18, 17, 16,
14, 13
1 I/O
O
I
20 I/O
I
I
19 I/O
I
I
18 I/O
I
I
17 I/O
I
I
16 I/O
I
I
14 I/O
O
I
13 I/O
I/O
I
Description
Port 0: Port 0 is an 8-bit I/O port with a user-configurable output type. During reset
Port 0 latches are configured in the input only mode with the internal pull-up disabled.
The operation of Port 0 pins as inputs and outputs depends upon the port configuration
selected. Each port pin is configured independently. Refer to Section 8.12.1 “Port
configurations” and Table 8 “DC electrical characteristics” for details.
The Keypad Interrupt feature operates with Port 0 pins.
All pins have Schmitt triggered inputs.
Port 0 also provides various special functions as described below:
P0.0 — Port 0 bit 0.
CMP2 — Comparator 2 output.
KBI0 — Keyboard input 0.
P0.1 — Port 0 bit 1.
CIN2B — Comparator 2 positive input B.
KBI1 — Keyboard input 1.
P0.2 — Port 0 bit 2.
CIN2A — Comparator 2 positive input A.
KBI2 — Keyboard input 2.
P0.3 — Port 0 bit 3.
CIN1B — Comparator 1 positive input B.
KBI3 — Keyboard input 3.
P0.4 — Port 0 bit 4.
CIN1A — Comparator 1 positive input A.
KBI4 — Keyboard input 4.
P0.5 — Port 0 bit 5.
CMPREF — Comparator reference (negative) input.
KBI5 — Keyboard input 5.
P0.6 — Port 0 bit 6.
CMP1 — Comparator 1 output.
KBI6 — Keyboard input 6.
P0.7 — Port 0 bit 7.
T1 — Timer/counter 1 external count input or overflow output.
KBI7 — Keyboard input 7.
9397 750 12285
Product data
Rev. 06 — 21 November 2003
© Koninklijke Philips Electronics N.V. 2003. All rights reserved.
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Table 4: Special function registers…continued
* indicates SFRs that are bit addressable.
Name
Description
SFR Bit functions and addresses
addr. MSB
LSB
Reset value
Hex Binary
P1M2
Port 1 output mode 2
92H (P1M2.7) (P1M2.6) - (P1M2.4) (P1M2.3) (P1M2.2) (P1M2.1) (P1M2.0) 00[1] 00x0xx00
P3M1
Port 3 output mode 1
B1H -
-
-
-
-
- (P3M1.1) (P3M1.0) 03[1] xxxxxx11
P3M2
Port 3 output mode 2
B2H -
-
-
-
-
- (P3M2.1) (P3M2.0) 00[1] xxxxxx00
PCON
Power control register
87H SMOD1 SMOD0 BOPD
BOI
GF1
GF0 PMOD1 PMOD0 00
00000000
PCONA Power control register A
B5H RTCPD
-
VCPD
-
I2PD
-
SPD
- 00[1] 00000000
Bit address D7 D6 D5 D4 D3 D2 D1 D0
PSW*
Program status word
D0H CY AC F0 RS1 RS0 OV F1
P 00H 00000000
PT0AD Port 0 digital input disable
F6H
-
- PT0AD.5 PT0AD.4 PT0AD.3 PT0AD.2 PT0AD.1 - 00H xx00000x
RSTSRC Reset source register
DFH
-
-
BOF
POF
R_BK R_WD R_SF R_EX
[3]
RTCCON Real-time clock control
D1H RTCF RTCS1 RTCS0
-
-
- ERTC RTCEN 60[1][6]
RTCH
Real-time clock register
HIGH
D2H
00[6] 00000000
RTCL
Real-time clock register LOW D3H
00[6] 00000000
SADDR Serial port address register A9H
00 00000000
SADEN Serial port address enable B9H
00 00000000
SBUF
Serial Port data buffer
register
99H
xx xxxxxxxx
Bit address 9F 9E 9D 9C 9B 9A 99 98
SCON* Serial port control
98H SM0/FE SM1
SM2
REN
TB8
RB8
TI
RI 00
00000000
SSTAT Serial port extended status BAH DBMOD INTLO CIDIS DBISEL FE BR OE STINT 00 00000000
register
SP Stack pointer
81H
07 00000111
TAMOD Timer 0 and 1 auxiliary mode 8FH
-
-
- T1M2 -
-
-
T0M2 00
xxx0xxx0
Bit address 8F 8E 8D 8C 8B 8A 89 88
TCON* Timer 0 and 1 control
88H TF1
TR1 TF0 TR0
IE1
IT1
IE0
IT0 00
00000000
TH0 Timer 0 HIGH
8CH
00 00000000
TH1 Timer 1 HIGH
8DH
00 00000000
TL0 Timer 0 LOW
8AH
00 00000000
TL1 Timer 1 LOW
8BH
00 00000000
TMOD Timer 0 and 1 mode
89H T1GATE T1C/T T1M1 T1M0 T0GATE T0C/T T0M1 T0M0 00
00000000

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