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P83CE598FHB Schematic ( PDF Datasheet ) - NXP Semiconductors

Teilenummer P83CE598FHB
Beschreibung 8-bit microcontroller with on-chip CAN
Hersteller NXP Semiconductors
Logo NXP Semiconductors Logo 




Gesamt 30 Seiten
P83CE598FHB Datasheet, Funktion
INTEGRATED CIRCUITS
DATA SHEET
P80CL410; P83CL410
Low voltage 8-bit microcontrollers
with I2C-bus
Product specification
Supersedes data of 1995 Jan 20
File under Integrated circuits, IC20
1997 Apr 10






P83CE598FHB Datasheet, Funktion
Philips Semiconductors
Low voltage 8-bit microcontrollers with
I2C-bus
7 PINNING INFORMATION
7.1 Pinning
Product specification
P80CL410; P83CL410
handbook, halfpage
P1.0/INT2 1
40 VDD
P1.1/INT3 2
39 P0.0/AD0
P1.2/INT4 3
38 P0.1/AD1
P1.3/INT5 4
37 P0.2/AD2
P1.4/INT6 5
36 P0.3/AD3
P1.5/INT7 6
35 P0.4/AD4
P1.6/INT8/SCL 7
34 P0.5/AD5
P1.7/INT9/SDA 8
33 P0.6/AD6
RST 9
32 P0.7/AD7
P3.0 10
P3.1 11
P80CL410 31 EA
P83CL410 30 ALE
P3.2/INT0 12
29 PSEN
P3.3/INT1 13
28 P2.7/A15
P3.4/T0 14
27 P2.6/A14
P3.5/T1 15
26 P2.5/A13
P3.6/WR 16
25 P2.4/A12
P3.7/RD 17
24 P2.3/A11
XTAL2 18
23 P2.2/A10
XTAL1 19
22 P2.1/A9
VSS 20
21 P2.0/A8
MBK017
1997 Apr 10
Fig.3 Pin configuration for DIP40 and VSO40 packages.
6

6 Page









P83CE598FHB pdf, datenblatt
Philips Semiconductors
Low voltage 8-bit microcontrollers with
I2C-bus
handbook, halfpage
7FH
Product specification
P80CL410; P83CL410
30H
2FH
bit-addressable space
(bit addresses 0 to 7F)
20H
R7 1FH
R0 18H
R7 17H
R0 10H 4 banks of 8 registers
R7 0FH (R0 to R7)
R0 08H
R7 07H
R0 0 MLA560 - 1
Fig.6 The lower 128 bytes of internal RAM.
9.3 Special Function Registers (SFRs)
The upper 128 bytes are the address locations of the
SFRs. Figure 7 shows the SFR space. The SFRs include
the port latches, timers, peripheral control, serial I/O
registers, etc. These registers can only be accessed by
direct addressing. There are 128 directly addressable
locations in the SFR address space (SFRs with addresses
divisible by eight).
9.4 Addressing
The P8xCL410 has five methods for addressing source
operands:
Register
Direct
Register-indirect
Immediate
Base-register plus index-register-indirect.
The first three methods can be used for addressing
destination operands. Most instructions have a
‘destination/source’ field that specifies the data type,
addressing methods and operands involved.
For operations other than MOVs, the destination operand
is also a source operand.
Access to memory addressing is as follows:
Registers in one of the four register banks through
register, direct or register-indirect
Internal RAM (128 bytes) through direct or
register-indirect
Special Function Registers through direct
External data memory through register-indirect
Program Memory look-up tables through base-register
plus index-register-indirect.
1997 Apr 10
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