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EL5825IR Schematic ( PDF Datasheet ) - Intersil Corporation

Teilenummer EL5825IR
Beschreibung 8-Channel TFT-LCD Reference Voltage Generator
Hersteller Intersil Corporation
Logo Intersil Corporation Logo 




Gesamt 12 Seiten
EL5825IR Datasheet, Funktion
®
Data Sheet
April 19, 2004
EL5825
FN7005.3
8-Channel TFT-LCD Reference Voltage
Generator
The EL5825 is designed to produce
the reference voltages required in
TFT-LCD applications. Each output is
programmed to the required voltage with 10 bits of
resolution. Reference pins determine the high and low
voltages of the output range, which are capable of swinging
to either supply rail. Programming of each output is
performed using the serial interface. A serial out pin enables
daisy chaining of multiple devices.
A number of the EL5825 can be stacked for applications
requiring more than 8 outputs. The reference inputs can be
tied to the rails, enabling each part to output the full voltage
range, or alternatively, they can be connected to external
resistors to split the output range and enable finer
resolutions of the outputs.
The EL5825 has 8 outputs and is available in both the 24-pin
TSSOP and the 24-pin QFN packages. It is specified for
operation over the full -40°C to +85°C temperature range.
Ordering Information
PART
NUMBER
PACKAGE TAPE & REEL
EL5825IL
24-Pin QFN
-
EL5825IL-T7
24-Pin QFN
7”
EL5825IL-T13 24-Pin QFN
13”
EL5825IR
24-Pin TSSOP
-
EL5825IR-T7 24-Pin TSSOP
7”
EL5825IR-T13 24-Pin TSSOP
13”
PKG. NO.
MDP0046
MDP0046
MDP0046
MDP0044
MDP0044
MDP0044
Features
• 8-channel reference outputs
• Accuracy of ±0.1%
• Supply voltage of 4.5V to 16.5V
• Digital supply 3.3V to 5V
• Low supply current of 8mA
• Rail-to-rail capability
Applications
• TFT-LCD drive circuits
• Reference voltage generators
Pinouts
EL5825
(24-PIN TSSOP)
TOP VIEW
EL5825
(24-PIN QFN)
TOP VIEW
1 SCLK
SDI 24
2 SDO
ENA 23
3 OSC
4 VSD
5 NC
6 VS
7 REFH
8 REFL
9 GND
10 NC
11 CAP
12 NC
OUTA 22
OUTB 21
OUTC 20
OUTD 19
GND 18
OUTE 17
OUTF 16
OUTG 15
OUTH 14
NC 13
OSC 1
VSD 2
NC 3
VS 4
REFH 5
REFL 6
GND 7
THERMAL
TherPmAaDl Pad
19 OUTB
18 OUTC
17 OUTD
16 GND
15 OUTE
14 OUTF
13 OUTG
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2004. All Rights Reserved. Elantec is a registered trademark of Elantec Semiconductor, Inc.
All other trademarks mentioned are the property of their respective owners.






EL5825IR Datasheet, Funktion
EL5825
Product Description
The EL5825 provides a versatile method of providing the
reference voltages that are used in setting the transfer
characteristics of LCD display panels.
The V/T (Voltage/Transmission) curve of the LCD panel
requires that a correction is applied to make it linear;
however, if the panel is to be used in more than one
application, the final curve may differ for different
applications.
By using the EL5825, this curve can be changed to optimize
its characteristics according to the required application of the
display product.
Each of the reference voltage outputs can be set with a
10-bit resolution. These outputs are available to within
100mV of the power rails of the EL5825.
As all of the output buffers are identical, it is also possible to
use the EL5825 for applications other than LCDs where 8
voltage references are required that can be set to a 10-bit
accuracy.
Serial Interface
The EL5825 is programmed through a three-wire serial
interface. The start and stop conditions are defined by the
ENA signal. While the ENA is low, the data on the SDI (serial
data input) pin is shifted into the 16-bit shift register on the
positive edge of the SCLK (serial clock) signal. The MSB (bit
15) is loaded first and the LSB (bit 0) is loaded last (see
Table 1). After the full 16-bit data has been loaded, the ENA
is pulled high and the addressed output channel is updated.
The SCLK is disabled internally when the ENA is high. The
SCLK must be low before the ENA is pulled low.
To facilitate the system designs that use multiple EL5825
chips, a buffered serial output of the shift register (SDO pin)
is available. Data appears on the SDO pin at the 16th falling
SCLK edge after being applied to the SDI pin.
To control the multiple EL5825 chips from a single three-wire
serial port, just connect the ENA pins and the SCLK pins
together, connect the SDO pin to the SDI pin on the next
chip. While the ENA is held low, the 16m-bit data is loaded to
the SDI input of the first chip. The first 16-bit data will go to
the last chip and the last 16-bit data will go to the first chip.
While the ENA is held high, all addressed outputs will be
updated simultaneously.
The Serial Timing Diagram and parameters table show the
timing requirements for three-wire signals.
The serial data has a minimum length of 16 bits, the MSB
(most significant bit) is the first bit in the signal. The bits are
allocated to the following functions (also refer to the Control
Bits Logic Table)
• Bit 15 is always set to a zero
• Bit 14 controls the source of the clock, see the next
section for details
• Bits 13 through 10 select the channel to be written to,
these are binary coded with channel A = 0, and channel
H=7
• The 10-bit data is on bits 9 through 0. Some examples of
data words are shown in the table of Serial Programming
Examples
TABLE 1. CONTROL BITS LOGIC TABLE
BIT NAME
DESCRIPTION
B15 Test Always 0
B14 Oscillator 0 = Internal, 1 = External
B13 A3 Channel Address (don’t care)
B12 A2 Channel Address
B11 A1 Channel Address
B10 A0 Channel Address
B9 D9 Data
B8 D8 Data
B7 D7 Data
B6 D6 Data
B5 D5 Data
B4 D4 Data
B3 D3 Data
B2 D2 Data
B1 D1 Data
B0 D0 Data
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6 Page









EL5825IR pdf, datenblatt
TSSOP Package Outline Drawing
EL5825
NOTE: The package drawing shown here may not be the latest version. To check the latest revision, please refer to the Intersil website at
<http://www.intersil.com/design/packages/index.asp>
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
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