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EL5221C Schematic ( PDF Datasheet ) - Elantec Semiconductor

Teilenummer EL5221C
Beschreibung Dual 12MHz Rail-to-Rail Input-Output Buffer
Hersteller Elantec Semiconductor
Logo Elantec Semiconductor Logo 




Gesamt 13 Seiten
EL5221C Datasheet, Funktion
EL5221C
Dual 12MHz Rail-to-Rail Input-Output Buffer
Features
12MHz -3dB bandwidth
Unity gain buffer
Supply voltage = 4.5V to 16.5V
Low supply current (per buffer) =
500µ A
High slew rate = 10V/µs
Rail-to-rail operation
Applications
TFT-LCD drive circuits
Electronics notebooks
Electronics games
Personal communication devices
Personal Digital Assistants (PDA)
Portable instrumentation
Wireless LANs
Office automation
Active filters
ADC/DAC buffer
Ordering Information
Part No.
EL5221CW-T7
EL5221CW-T13
EL5221CY-T7
EL5221CY-T13
Package
SOT23-6
SOT23-6
MSOP-8
MSOP-8
Tape & Reel
7
13
7
13
Outline #
MDP0038
MDP0038
MDP0043
MDP0043
General Description
The EL5221C is a dual, low power, high voltage rail-to-rail input-out-
put buffer. Operating on supplies ranging from 5V to 15V, while
consuming only 500µA per channel, the EL5221C has a bandwidth of
12MHz (-3dB). The EL5221C also provides rail-to-rail input and out-
put ability, giving the maximum dynamic range at any supply voltage.
The EL5221C also features fast slewing and settling times, as well as
a high output drive capability of 30mA (sink and source). These fea-
tures make the EL5221C ideal for use as voltage reference buffers in
Thin Film Transistor Liquid Crystal Displays (TFT-LCD). Other
applications include battery power, portable devices, and anywhere
low power consumption is important.
The EL5221C is available in space-saving SOT23-6 and MSOP-8
packages and operates over a temperature range of -40°C to +85°C.
Connection Diagrams
VINA 1
VS- 2
VINB 3
SOT23-6
6 VOUTA
5 VS+
4 VOUTB
VOUTA 1
NC 2
VINA 3
VS- 4
MSOP-8
8 VS+
7 VOUTB
6 NC
5 VINB
Note: All information contained in this data sheet has been carefully checked and is believed to be accurate as of the date of publication; however, this data sheet cannot be a “controlled document”. Current revisions, if any, to these
specifications are maintained at the factory and are available upon your request. We recommend checking the revision level before finalization of your design documentation.
© 2000 Elantec Semiconductor, Inc.






EL5221C Datasheet, Funktion
EL5221C
Dual 12MHz Rail-to-Rail Input-Output Buffer
Typical Performance Curves
Voltage Gain vs Temperature
1.001
1.0005
1.0000
VS=±5V
0.9995
0.999
-50
0 50 100
Temperature (°C)
150
Supply Current per Channel vs Temperature
0.55
VS=±5V
0.5
0.45
0.4
-50
0 50 100
Temperature (°C)
150
Frequency Response for Various RL
5
0
CL=10pF
-5 VS=±5V
10k
1k
560
150
-10
-15
100k
1M 10M
Frequency (Hz)
100M
Slew Rate vs Temperature
13
12.5 VS=±5V
12
11.5
11
10.5
10
-50
0 50 100
Temperature (°C)
150
Supply Current per Channel vs Supply Voltage
650
550 TA=25°C
450
350
250
0
5 10 15
Supply Voltage (V)
20
Frequency Response for Various CL
20
RL=10k
10 VS=±5V
0
-10
12pF
50pF
100pF
-20
-30
100k
1000pF
1M 10M
Frequency (Hz)
100M
6

6 Page









EL5221C pdf, datenblatt
EL5221C
Dual 12MHz Rail-to-Rail Input-Output Buffer
Driving Capacitive Loads
The EL5221C can drive a wide range of capacitive
loads. As load capacitance increases, however, the -3dB
bandwidth of the device will decrease and the peaking
increase. The buffers drive 10pF loads in parallel with
10kwith just 1.5dB of peaking, and 100pF with 6.4dB
of peaking. If less peaking is desired in these applica-
tions, a small series resistor (usually between 5and
50) can be placed in series with the output. However,
this will obviously reduce the gain slightly. Another
method of reducing peaking is to add a "snubber" circuit
at the output. A snubber is a shunt load consisting of a
resistor in series with a capacitor. Values of 150and
10nF are typical. The advantage of a snubber is that it
does not draw any DC load current or reduce the gain
Power Supply Bypassing and Printed Circuit
Board Layout
The EL5221C can provide gain at high frequency. As
with any high frequency device, good printed circuit
board layout is necessary for optimum performance.
Ground plane construction is highly recommended, lead
lengths should be as short as possible, and the power
supply pins must be well bypassed to reduce the risk of
oscillation. For normal single supply operation, where
the VS- pin is connected to ground, a 0.1µF ceramic
capacitor should be placed from VS+ to pin to VS- pin. A
4.7µF tantalum capacitor should then be connected in
parallel, placed in the region of the buffer. One 4.7µF
capacitor may be used for multiple devices. This same
capacitor combination should be placed at each supply
pin to ground if split supplies are to be used.
12

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