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DM74AS874WM Schematic ( PDF Datasheet ) - Fairchild Semiconductor

Teilenummer DM74AS874WM
Beschreibung Dual 4-Bit D-Type Edge-Triggered Flip-Flop
Hersteller Fairchild Semiconductor
Logo Fairchild Semiconductor Logo 




Gesamt 6 Seiten
DM74AS874WM Datasheet, Funktion
October 1986
Revised March 2000
DM74AS874
Dual 4-Bit D-Type Edge-Triggered Flip-Flop
General Description
These dual 4-bit inverting registers feature totem-pole 3-
STATE outputs designed specifically for driving highly-
capacitive or relatively low-impedance loads. The high-
impedance state and increased high-logic-level drive pro-
vide these registers with the capability of being connected
directly to and driving the bus lines in a bus-organized sys-
tem without need for interface or pull-up components. They
are particularly attractive for implementing buffer registers,
I/O ports, bidirectional bus drivers, and working registers.
The eight flip-flops of the DM74AS874 are edge-triggered
D-type flip-flops. On the positive transition of the clock, the
Q outputs will be set to the logic states that were set up at
the D inputs.
A buffered output control input can be used to place the
eight outputs in either a normal logic state (HIGH or LOW
logic levels) or a high-impedance state. In the high-imped-
ance state the outputs neither load nor drive the bus lines
significantly.
The output control does not affect the internal operation of
the flip-flops. That is, the old data can be retained or new
data can be entered even while the outputs are OFF.
The pinout is arranged to ease printed circuit board layout.
All data inputs are on one side of the package, while all
outputs are on the other side.
Features
s Switching specifications at 50 pF
s Switching specifications guaranteed over full tempera-
ture and VCC range
s Advanced oxide-isolated, ion-implanted Schottky TTL
process
s 3-STATE buffer-type outputs drive bus lines directly
s Space saving 300 mil wide package
s Bus structured pinout
Ordering Code:
Order Number Package Number
Package Description
DM74AS874WM
M24B
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
DM74AS874NT
N24C
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-100, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
© 2000 Fairchild Semiconductor Corporation DS006331
www.fairchildsemi.com






DM74AS874WM Datasheet, Funktion
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-100, 0.300 Wide
Package Number N24C
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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