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DM74ALS1240A Schematic ( PDF Datasheet ) - Fairchild Semiconductor

Teilenummer DM74ALS1240A
Beschreibung Octal 3-STATE Bus Driver
Hersteller Fairchild Semiconductor
Logo Fairchild Semiconductor Logo 




Gesamt 4 Seiten
DM74ALS1240A Datasheet, Funktion
September 1986
Revised February 2000
DM74ALS1240A
Octal 3-STATE Bus Driver
General Description
These octal 3-STATE bus drivers are designed to provide
the designer with flexibility in implementing a bus interface
with memory, microprocessor, or communication systems,
and are low power dissipation versions of the
DM74ALS240A and DM74ALS241A. The output 3-STATE
gating control is organized into two separate groups of four
buffers. The DM74ALS1240A control inputs symmetrically
enable the respective outputs when set logic LOW. The 3-
STATE circuitry contains a feature that maintains the buffer
outputs in 3-STATE (high impedance state) during power
supply ramp-up or ramp-down. This eliminates bus glitch-
ing problems that arise during power-up and power-down.
Features
s Advanced oxide-isolated, ion-implanted Schottky TTL
process
s Switching response specified into 500and 50 pF load
s Switching response specifications guaranteed over full
temperature and VCC supply range
s PNP input design reduces input loading
s Low power dissipation version
s Low level drive current: 74ALS = 16 mA
Ordering Code:
Order Number Package Number
Package Description
DM74ALS1240AWM
M20B
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Logic Diagram
Function Table
Input
Output
GAY
L LH
LHL
HX Z
H = HIGH Level Logic State
L = LOW Level Logic State
X = Don't Care (Either LOW or HIGH Level Logic State)
Z = High Impedance (OFF) State
© 2000 Fairchild Semiconductor Corporation DS006261
www.fairchildsemi.com





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