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Número de pieza | DM54L93 | |
Descripción | Decade/ Divide-by-12/ and Binary Counters | |
Fabricantes | National Semiconductor | |
Logotipo | ||
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No Preview Available ! June 1989
DM54L93
Decade Divide-by-12 and Binary Counters
General Description
Each of these monolithic counters contains four master-
slave flip-flops and additional gating to provide a divide-by-
two counter and a three-stage binary counter for which the
count cycle length is divide-by-eight
To use their maximum count length (decade divide-by-
twelve or four-bit binary) the B input is connected to the QA
output The input count pulses are applied to input A and the
outputs are as described in the appropriate truth table
Features
Y Typical power dissipation 16 mW
Y Count frequency 15 MHz
Connection Diagram
Dual-In-Line Package
Function Tables
COUNT SEQUENCE
(See Note A)
TL F 6637 – 1
Order Number DM54L93J or DM54L93W
See NS Package Number J14A or W14B
Count
Output
QD QC QB
0 LLL
1 LLL
2 LLH
3 LLH
4 LHL
5 LHL
6 LHH
7 LHH
8 HLL
9 HLL
10 H L H
11 H L H
12 H H L
13 H H L
14 H H H
15 H H H
QA
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
RESET COUNT TRUTH TABLE (Note B)
Reset Inputs
Output
R0(1)
H
L
X
R0(2) QD QC QB QA
H LLLL
X COUNT
L COUNT
Note A Output QA is connected to input B
Note B H e High Level L e Low Level X e Don’t Care
C1995 National Semiconductor Corporation TL F 6637
RRD-B30M105 Printed in U S A
1 page |
Páginas | Total 4 Páginas | |
PDF Descargar | [ Datasheet DM54L93.PDF ] |
Número de pieza | Descripción | Fabricantes |
DM54L93 | Decade/ Divide-by-12/ and Binary Counters | National Semiconductor |
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