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Teilenummer | EBS52UC8APSA-7A |
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Beschreibung | 512MB SDRAM S.O.DIMM | |
Hersteller | Elpida Memory | |
Logo | ||
Gesamt 14 Seiten DATA SHEET
512MB SDRAM S.O.DIMM
EBS52UC8APSA (64M words × 64 bits, 2 bank)
Description
The EBS52UC8APSA is 64M words × 64 bits, 2 banks
Synchronous Dynamic RAM Small Outline Dual In-line
Memory Module (S.O.DIMM), mounted 16 pieces of
256M bits SDRAM sealed in µBGA package. This
module provides high density and large quantities of
memory in a small space without utilizing the surface
mounting technology. Decoupling capacitors are
mounted on power supply line for noise reduction.
Note : Do not push the cover or drop the modules in
order to protect from mechanical defects, which
would be electrical defects.
Features
• Fully compatible with 8 bytes S.O.DIMM: JEDEC
standard outline
• 144-pin socket type small outline dual in line memory
module (S.O.DIMM)
PCB height: 31.75mm (1.25inch )
Lead pitch: 0.80mm
• 3.3V power supply
• Clock frequency: 133MHz (max.)
• LVTTL interface
• Data bus width: × 64 non-ECC
• Single pulsed /RAS
• 4 Banks can operates simultaneously and
independently
• Burst read/write operation and burst read/single write
operation capability
• Programmable burst length (BL): 1, 2, 4, 8, Full page
• 2 variations of burst sequence
Sequential
Interleave
• Programmable /CAS latency (CL): 2, 3
• Byte control by DQMB
• Refresh cycles: 8192 refresh cycles/64ms
• 2 variations of refresh
Auto refresh
Self refresh
Document No. E0240E20 (Ver. 2.0)
Date Published May 2002 (K) Japan
URL: http://www.elpida.com
Elpida Memory, Inc. 2001-2002
EBS52UC8APSA
Block Diagram
/WE
/CS1
/CS0
DQMB0
DQ0
to DQ7
DQMB1
DQ8
to DQ15
/CS /WE
DQM
D0
N0, N1 I/O0
to I/O7
/CS /WE
DQM
D1
N2, N3 I/O0
to I/O7
/CS /WE
DQM
DQMB4
D8
I/O0
to I/O7
DQ32
to DQ39
/CS /WE
DQM
D9
I/O0
to I/O7
DQMB5
DQ40
to DQ47
N8, N9
/CS /WE
DQM
D4
I/O0
to I/O7
/CS /WE
DQM
D5
N10, N11 I/O0
to I/O7
/CS /WE
DQM
D12
I/O0
to I/O7
/CS /WE
DQM
D13
I/O0
to I/O7
DQMB2
DQ16
to DQ23
/CS /WE
DQM
D2
N4, N5 I/O0
to I/O7
/CS /WE
DQM
DQMB6
D10
I/O0
to I/O7
DQ48
to DQ55
/CS /WE
DQM
D6
N12, N13 I/O0
to I/O7
/CS /WE
DQM
D14
I/O0
to I/O7
DQMB3
DQ24
to DQ31
/CS /WE
DQM
D3
N6, N7 I/O0
to I/O7
/CS /WE
DQM
D11
I/O0
to I/O7
DQMB7
DQ56
to DQ63
/CS /WE
DQM
D7
N14, N15 I/O0
to I/O7
/CS /WE
DQM
D15
I/O0
to I/O7
/RAS
/CAS
A0 to A12
BA0, BA1
CKE0
CKE1
CLK0
CLK1
VDD
VSS
C0 to C8
/RAS (D0 to D15)
/CAS (D0 to D15)
Ax (D0 to D15)
BAx (D0 to D15)
CKE (D0 to D7)
CKE (D8 to D15)
CLK (D0, D1, D8, D9)
CLK (D2, D3, D10, D11)
CLK (D4, D5, D12, D13)
CLK (D6, D7, D14, D15)
VDD (D0 to D15)
C9 to C32
VSS (D0 to D15)
Serial PD
SCL
SCL
SDA
A0 U0
A1
A2
VSS
SDA
* D0 to D15 : 256M bits SDRAM
U0 : 2k bits EEPROM
C0 to C8 : 0.1µF
C9 to C32 : 2200pF
N0 to N15 : Network resistors (10Ω)
Data Sheet E0240E20 (Ver. 2.0)
6
6 Page Physical Outline
EBS52UC8APSA
(Datum -A-)
2R3.00 Min
Unit:mm
3.80 Max
Component area
(front)
3.30
23.20
2.50
B
32.80
4.60
A
67.60 ± 0.15
3.70
2.10
23.20
4.60
32.80
1.00 ± 0.10
2-R2.00
Detail A
Component area
(back)
(Datum -A-)
0.60 ± 0.05
2.00 Min
Detail B
2.5
(DATUM -A-)
R0.75
0.80
1.50 ± 0.10
ECA-TS2-0044-02
Data Sheet E0240E20 (Ver. 2.0)
12
12 Page | ||
Seiten | Gesamt 14 Seiten | |
PDF Download | [ EBS52UC8APSA-7A Schematic.PDF ] |
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